OP15/OP17
؇
؇
Electrical Characteristics (@ V = ±15 V, –55 C £ T £ 125 C, unless otherwise noted.)
S
A
Conditions
RS = 50 W
Parameter
Symbol
Min
Typ
Max
Units
Input Offset Voltage
VOS
0.4
0.9
mV
Average Input Offset Voltage Drift1
Without External T rim
With External T rim
T CVOS
T CVOS
2
2
5
mV/∞C
mV/∞C
RP = 100 W
Input Offset Current2
OP17
IOS
TJ = 125∞C
TA = 125∞C, device operating
0.6
1.0
4.0
8.5
nA
nA
Input Bias Current2
OP17
IB
TJ = 125∞C
TA = 125∞C, device operating
±1.2
±2.0
±5.0
±11
nA
nA
Input Voltage Range
IVR
±10.4
V
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
CMRR
PSRR
AVO
VCM = ±10.4 V
85
97
dB
VS = ±10 V to ±18 V
RL ≥ 2 kW, VO = ± 10 V
RL ≥ 10 kW
15
57
mV/V
V/mV
V
35
120
±13
VO
±12
NOT ES
1Sample tested.
2Input bias current is specified for two different conditions. T he T J = 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. T he warmed-up bias current value is correlated to the junction temperature value via the
curves of IB versus T J and IB versus T A. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I B and
IOS are measured at VCM = 0.
؇
؇
؇
؇
ELECTRICAL CHARACTERISTICS (@ V = ؎15 V, 0 C £ T £ 70 C for E and F grades, –40 C £ T £ 85 C for G grades
unless otherwise noted)
S
A
A
OP15E/OP17E
OP15F/OP17F
OP15G/OP17G
Parameter
Symbol
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max Unit
Input Offset Voltage VOS
RS = 50 W
0.3
0.75
0.55
1.5
0.7
3.8
mV
Average Input Offset
Voltage Drift1
Without External Trim T CVOS
2
2
5
3
3
10
4
4
30
mV/∞C
mV/∞C
With External T rim
T CVOSn
RP = 100 W
T J = 70∞C
TA = 70∞C, Device Operating
T J = 70∞C
Input Offset Current2 IOS
OP15
0.04
0.06
0.04
0.07
0.30
0.55
0.30
0.70
0.06
0.08
0.06
0.10
0.45
0.80
0.45
1.1
0.08
0.10
0.08
0.15
0.85 nA
1.2 nA
0.85 nA
1.7 nA
OP17
TA = 70∞C, Device Operating
Input Bias Current2
OP15
IB
T J = 70∞C
TA = 70∞C, Device Operating
T J = 70∞C
±0.10 ±0.40
±0.13 ±0.75
±0.10 ±0.40
±0.15 ±0.90
±0.12 ±0.60
±0.16 ±1.1
±0.12 ±0.60
±0.20 ±1.4
±0.14 ±0.80 nA
±0.19 ±1.5 nA
±0.14 ±0.80 nA
±0.25 ±2.0 nA
OP17
TA = 70∞C, Device Operating
Input Voltage Range IVR
±10.4
±10.4
±10.25
V
Common-Mode
Rejection Ratio
CMRR
VCM = ±10.4 V
VCM = ±10.25 V
85
98
85
96
dB
dB
80
94
Power Supply
Rejection Ratio
PSRR
AVO
VO
VS = ±10 V to ±18 V
VS = ±10 V to ±15 V
13
57
13
57
mV/V
mV/V
20
100
Large Signal
Voltage Gain
RL ≥ 2 kW
VO = ±10 V
65
200
±13
50
180
±13
35
160
V/mV
Output Voltage
Swing
RL ≥ 10 kW
±12
±12
±12
±13
V
NOT ES
1Sample tested.
2Input bias current is specified for two different conditions. T he T J = 25∞C specification is with the junction at ambient temperature; the device operating specification
is with the device operating in a warmed-up condition at 25∞C ambient. T he warmed-up bias current value is correlated to the junction temperature value via the
curves of IB versus T J and IB versus T A. ADI has a bias current compensation circuit which gives improved bias current over the standard JFET input op amps. I B and
IOS are measured at VCM = 0.
–3–
REV. A
ADI [ ADI ]
