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AT45DB081D-SU 参数 Datasheet PDF下载

AT45DB081D-SU图片预览
型号: AT45DB081D-SU
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位2.5V或2.7V的DataFlash [8-megabit 2.5V or 2.7V DataFlash]
分类和应用: 内存集成电路光电二极管异步传输模式PCATM时钟
文件页数/大小: 53 页 / 1867 K
品牌: ADI [ ADI ]
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AT45DB081D  
12.1 Resume from Deep Power-down  
The Resume from Deep Power-down command takes the device out of the Deep Power-down  
mode and returns it to the normal standby mode. To Resume from Deep Power-down mode, the  
CS pin must first be asserted and an opcode of ABH command must be clocked in via input pin  
(SI). After the last bit of the command has been clocked in, the CS pin must be de-asserted to  
terminate the Deep Power-down mode. After the CS pin is de-asserted, the device will return to  
the normal standby mode within the maximum tRDPD time. The CS pin must remain high during  
the tRDPD time before the device can receive any commands. After resuming form Deep Power-  
down, the device will return to the normal standby mode.  
Table 12-2. Resume from Deep Power-down  
Command  
Opcode  
Resume from Deep Power-down  
ABH  
Figure 12-2. Resume from Deep Power-Down  
CS  
Opcode  
SI  
Each transition  
represents 8 bits  
13. “Power of 2” Binary Page Size Option  
“Power of 2” binary page size Configuration Register is a user-programmable nonvolatile regis-  
ter that allows the page size of the main memory to be configured for binary page size (256-  
bytes) or DataFlash standard page size (264-bytes). The “power of 2” page size is a one-time  
programmable configuration register and once the device is configured for “power of 2”  
page size, it cannot be reconfigured again. The devices are initially shipped with the page  
size set to 264-bytes. The user has the option of ordering binary page size (256-bytes) devices  
from the factory. For details, please refer to Section 26. ”Ordering Information” on page 47.  
For the binary “power of 2” page size to become effective, the following steps must be followed:  
1. Program the one-time programmable configuration resister using opcode sequence  
3DH, 2AH, 80H and A6H (please see Section 13.1).  
2. Power cycle the device (i.e. power down and power up again).  
3. User can now program the page for the binary page size.  
If the above steps are not followed in setting the the page size prior to page programming, user  
may expect incorrect data during a read operation.  
The address format will be changed after the device is configured for “power of 2” page size.  
See Section 21.7 ”Command Sequence for Read/Write Operations for Page Size 256-Bytes  
(Except Status Register Read, Manufacturer and Device ID Read)” on page 38.  
23  
3596O–DFLASH–1/2013  
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