AT45DB081D
completion of the compare operation, bit six of the status register is updated with the result of
the compare.
11.3 Auto Page Rewrite
This mode is only needed if multiple bytes within a page or multiple pages of data are modified in
a random fashion within a sector. This mode is a combination of two operations: Main Memory
Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of
data is first transferred from the main memory to buffer 1 or buffer 2, and then the same data
(from buffer 1 or buffer 2) is programmed back into its original page of main memory. To start the
rewrite operation for the DataFlash standard page size (264-bytes), a 1-byte opcode, 58H for
buffer 1 or 59H for buffer 2, must be clocked into the device, followed by three address bytes
comprised of three don’t care bits, 12 page address bits (PA11-PA0) that specify the page in
main memory to be rewritten and nine don’t care bits. To initiate an auto page rewrite for a
binary page size (256-bytes), the opcode 58H for buffer 1 or 59H for buffer 2, must be clocked
into the device followed by three address bytes consisting of four don’t care bits, 12 page
address bits (A19 - A8) that specify the page in the main memory that is to be written and eight
don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first transfer data
from the page in main memory to a buffer and then program the data from the buffer back into
same page of main memory. The operation is internally self-timed and should take place in a
maximum time of tEP. During this time, the status register will indicate that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page, then the programming
algorithm shown in Figure 25-1 (page 45) is recommended. Otherwise, if multiple bytes in a
page or several pages are programmed randomly in a sector, then the programming algorithm
shown in Figure 25-2 (page 46) is recommended. Each page within a sector must be
updated/rewritten at least once within every 20,000 cumulative page erase/program operations
in that sector. Please contact Adesto for availability of devices that are specified to exceed the
20K cycle cumulative limit.
11.4 Status Register Read
The status register can be used to determine the device’s ready/busy status, page size, a Main
Memory Page to Buffer Compare operation result, the Sector Protection status or the device
density. The Status Register can be read at any time, including during an internally self-timed
program or erase operation. To read the status register, the CS pin must be asserted and the
opcode of D7H must be loaded into the device. After the opcode is clocked in, the 1-byte status
register will be clocked out on the output pin (SO), starting with the next clock cycle. The data in
the status register, starting with the MSB (bit 7), will be clocked out on the SO pin during the next
eight clock cycles. After the one byte of the status register has been clocked out, the sequence
will repeat itself (as long as CS remains low and SCK is being toggled). The data in the status
register is constantly updated, so each repeating sequence will output new data.
Ready/busy status is indicated using bit seven of the status register. If bit seven is a one, then
the device is not busy and is ready to accept the next command. If bit seven is a zero, then the
device is in a busy state. Since the data in the status register is constantly updated, the user
must toggle SCK pin to check the ready/busy status. There are several operations that can
cause the device to be in a busy state: Main Memory Page to Buffer Transfer, Main Memory
Page to Buffer Compare, Buffer to Main Memory Page Program, Main Memory Page Program
through Buffer, Page Erase, Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.
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3596O–DFLASH–1/2013
ADI [ ADI ]
