ADV7180
Table 103. Register Map Descriptions (Normal Operation)
Bits (Shading Indicates Default
State)
Comments
LQFP-64
Subaddress Register
0x00 Input Control
Bit Description
Notes
7
6
5
4
3
0
0
0
0
0
0
0
2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
0
LFCSP-40
Composite
Reserved
Reserved
Composite
Composite
Reserved
S-Video
INSEL [3:0]. The INSEL
bits allow the user to
select an input channel
and the input format.
Composite
Composite
Composite
Composite
Composite
Composite
S-Video
Refer to Table 9 and
Table 8 for full routing
details.
Mandatory write required
for Y/C (S-video mode)
Reg 0x58 = 0x04; see
0
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
S-Video
S-Video
YPrPb
Reserved
Reserved
YPrPb
Reg 0x58 for bit description
YPrPb
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
VID_SEL [3:0]. The
0
0
0
0
0
0
0
1
Autodetect PAL B/G/H/I/D,
NTSC (without pedestal),
SECAM
VID_SEL bits allow the
user to select the input
video standard.
Autodetect PAL B/G/H/I/D,
NTSC M (with pedestal),
SECAM
0
0
0
0
1
1
0
1
Autodetect PAL N, NTSC M
(without pedestal), SECAM
Autodetect PAL N, NTSC M
(with pedestal), SECAM
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
0
0
0
1
0
1
0
1
NTSC J
NTSC M
PAL 60
NTSC 4.43
PAL B/G/H/I/D
PAL N (B/G/H/I/D without
pedestal)
1
1
1
1
0
0
1
1
1
1
0
0
0
1
0
1
PAL M (without pedestal)
PAL M
PAL Combination N
PAL Combination N
(with pedestal)
1
1
1
1
1
1
0
1
SECAM
SECAM (with pedestal)
Set to default
0x01
Video Selection
Reserved.
0
0
0
ENVSPROC.
0
1
Disable vsync processor
Enable vsync processor
Set to default
Reserved.
BETACAM.
0
0
1
Standard video input
Betacam input enable
Disable hsync processor
Enable hsync processor
Set to default
ENHSPLL.
Reserved.
0
1
1
Rev. A | Page 80 of 112
ADI [ ADI ]
