ADV7180
Data Sheet
Bits
(Shading Indicates Default State)
Subaddress
Register
Bit Description
7
6
5
4
3
2
1
0
0
1
Comments
Notes
0x59
General-
purpose
outputs
GPO[3:0]; LQFP only
Outputs 0 to GPO0
Outputs 1 to GPO0
Outputs 0 to GPO1
Outputs 1 to GPO1
Outputs 0 to GPO2
Outputs 1 to GPO2
Outputs 0 to GPO3
Outputs 1 to GPO3
GPO[3:0] three-stated
GPO[3:0] enabled
GPO_ENABLE
must be set to 1
for these bits to
take effect
0
1
0
1
0
1
GPO_ENABLE
0
1
Reserved
Reserved
0
0
0
0x8F
Free-Run Line
Length 1
0
0
0
0
Set to default
LLC_PAD_SEL[2:0]; enables
manual selection of the
clock for the LLC pin
0
1
0
0
0
1
LLC (nominal 27 MHz) selected out
on LLC pin
LLC (nominal 13.5 MHz) selected out
on LLC pin
For 16-bit 4:2:2 out,
OF_SEL[3:0] = 0010
Reserved
0
x
Set to default
0x99
0x9A
0x9B
CCAP1
(read only)
CCAP1[7:0]; closed
caption data register
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CCAP1[7] contains parity bit for Byte 0
CCAP2
(read only)
CCAP2[7:0]; closed
caption data register
x
x
CCAP2[7] contains parity bit for Byte 0
Letterbox 1
(read only)
LB_LCT[7:0]; letterbox
data register
Reports the number of black lines
detected at the top of active video
This feature
examines the active
video at the start
and end of each
field; it enables
format detection
even if the video is
not accompanied
by a CGMS or WSS
sequence
0x9C
0x9D
Letterbox 2
(read only)
LB_LCM[7:0]; letterbox
data register
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Reports the number of black lines
detected in the bottom half of active
video if subtitles are detected
Letterbox 3
(read only)
LB_LCB[7:0]; letterbox
data register
Reports the number of black lines
detected at the bottom of active video
0xB2
0xC3
CRC enable
(write only)
Reserved
0
0
Set as default
CRC_ENABLE; enable CRC
checksum decoded from
FMS packet to validate
CGMSD
0
1
Turn off CRC check
CGMSD goes high with valid checksum
Reserved
0
0
0
1
1
Set as default
ADC Switch 1
MUX0[2:0]; manual
LQFP
No connect
AIN1
LFCSP
MAN_MUX_EN = 1
muxing control for MUX0;
this setting controls which
input is routed to the ADC
for processing
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
No connect
AIN1
AIN2
No connect
No connect
AIN2
AIN3
AIN4
AIN5
AIN3
AIN6
No connect
No connect
No connect
Reserved
0
MUX1[2:0]; manual
LQFP
LFCSP
MAN_MUX_EN = 1
muxing control for MUX1;
this setting controls which
input is routed to the ADC
for processing
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
No connect
No connect
No connect
AIN3
No connect
No connect
No connect
No connect
AIN2
AIN4
AIN5
AIN3
AIN6
No connect
No connect
No connect
Reserved
0
Rev. G | Page 94 of 120
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