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ADV7180KST48Z-RL 参数 Datasheet PDF下载

ADV7180KST48Z-RL图片预览
型号: ADV7180KST48Z-RL
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 4A ?过采样SDTV视频解码器 [10-Bit, 4× Oversampling SDTV Video Decoder]
分类和应用: 解码器电视
文件页数/大小: 120 页 / 2118 K
品牌: ADI [ ADI ]
 浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第86页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第87页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第88页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第89页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第91页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第92页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第93页浏览型号ADV7180KST48Z-RL的Datasheet PDF文件第94页  
ADV7180  
Data Sheet  
Bits  
(Shading Indicates Default State)  
Subaddress  
Register  
Bit Description  
7
6
5
4
3
2
1
0
Comments  
Notes  
0x2E  
Chroma Gain  
Control 2,  
Chroma Gain2  
(CG)  
CMG[7:0]/CG[7:0]; chroma  
manual gain lower eight  
bits; see CMG[11:8]/  
0
0
0
0
0
0
0
0
CMG[11:0] = see the CMG section  
CMG[11:0] = see the CMG section  
Min value = 0d,  
Max value = 4095d  
CG[11:8] for description  
0x2F  
Luma Gain  
Control 1, Luma  
Gain1 (LG)  
LMG[11:8]/LG[11:8]; in  
manual mode, luma gain  
control can be used to  
program a desired manual  
luma gain; in auto mode,  
it can be used to read  
back the actual gain value  
used  
x
x
x
x
LAGC[1:0] settings decide in which  
mode LMG[11:0] operates  
Reserved  
1
x
1
x
Set to 1  
LAGT[1:0]; luma auto  
matic gain timing allows  
adjustment of the luma  
AGC tracking speed  
0
0
1
1
x
0
1
0
1
x
Slow (TC = 2 sec)  
Medium (TC = 1 sec)  
Fast (TC = 0.2 sec)  
Adaptive  
Only has an effect  
if LAGC[1:0] is set  
to autogain (001,  
010, 011, or 100)  
LMG[7:0]/LG[7:0]; luma  
manual gain lower eight  
bits; see LMG[11:8]/  
x
x
x
x
LMG[11:0] - see the LMG section  
LMG[11:0] =- see the LMG section  
Min value = 1024d,  
Max value = 4095d  
0x30  
0x31  
Luma Gain  
Control 2, Luma  
Gain2 (LG)  
LG[11:8] for description  
Reserved  
0
1
0
Set to default  
VS/FIELD  
Control 1  
HVSTIM; selects where  
within a line of video the  
VS signal is asserted  
0
1
Start of line relative to HSE  
Start of line relative to HSB  
HSE = HSYNC end  
HSB = HSYNC begin  
NEWAVMODE; sets the  
EAV/SAV mode  
0
1
EAV/SAV codes generated to suit  
Analog Devices encoders  
Manual VS/FIELD position controlled by  
the 0x32, 0x33, and 0xE5 to 0xEA registers  
Reserved  
Reserved  
VSBHE  
0
0
0
0
Set to default  
Set to default  
0
0
0
1
0
0
0
0
1
0
0
NEWAVMODE bit  
must be set high  
0x32  
0x33  
0x34  
VS/FIELD  
Control 2  
0
1
VS goes high in the middle of the  
line (even field)  
VS changes state at the start of the  
line (even field)  
VSBHO  
0
1
VS goes high in the middle of the  
line (odd field)  
VS changes state at the start of the  
line (odd field)  
Reserved  
VSEHE  
0
0
0
Set to default  
VS/FIELD  
Control 3  
0
1
VS goes low in the middle of the  
line (even field)  
NEWAVMODE bit  
must be set high  
VS changes state at the start of the  
line (even field)  
VSEHO  
0
1
VS goes low in the middle of the line  
(odd field)  
VS changes state at the start of the  
line odd field  
HSE[10:8]; HS end allows  
positioning of the HS  
output within the  
video line  
HS output ends HSE[10:0] pixels after  
the falling edge of HSYNC  
Using HSB and  
HSE the user can  
program the  
position and length  
of the output  
HSYNC  
HS Position  
Control 1  
Reserved  
0
Set to 0  
HSB[10:8]; HS begin  
allows positioning of  
the HS output within  
the video line  
0
0
0
0
0
0
HS output starts HSB[10:0] pixels  
after the falling edge of HSYNC  
Reserved  
0
0
Set to 0  
0x35  
0x36  
HS Position  
Control 2  
HSB[7:0]; see Address 0x34,  
using HSB[10:0] and  
HSE[10:0], users can  
program the position  
and length of the HS  
output signal  
0
0
0
0
1
0
0
0
HS Position  
Control 3  
HSE[7:0]; see Address  
0x35 description  
0
0
0
0
Rev. G | Page 90 of 120  
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