ADV7180
Data Sheet
Bit (Shading Indicates
Default State)
User Sub Map
Bit Description
Address Register
7
6
5
4
3
2
1
0
Comments
Notes
0x74
0x75
0x76
0x77
0x78
VDP_LINE_01E
VBI_DATA_P334_N282[3:0]
VBI_DATA_P21_N19[3:0]
VBI_DATA_P335_N283[3:0]
VBI_DATA_P22_N20[3:0]
VBI_DATA_P336_N284[3:0]
VBI_DATA_P23_N21[3:0]
VBI_DATA_P337_N285[3:0]
VBI_DATA_P24_N22[3:0]
CC_AVL
0
0
0
0
Sets VBI standard to be decoded from
Line 334 (PAL), Line 282 (NTSC)
MAN_LINE_PGM must
be set to 1 for these bits
to be effective
0
0
0
0
Sets VBI standard to be decoded from
Line 21 (PAL), Line 19 (NTSC)
VDP_LINE_01F
VDP_LINE_020
VDP_LINE_021
0
0
0
0
0
0
0
0
0
0
0
0
Sets VBI standard to be decoded from
Line 335 (PAL), Line 283 (NTSC)
MAN_LINE_PGM must be
set to 1 for these bits to
be effective
0
0
0
0
0
0
0
0
0
0
0
0
Sets VBI standard to be decoded from
Line 22 (PAL), Line 20 (NTSC)
Sets VBI standard to be decoded from
Line 336 (PAL), Line 284 (NTSC)
MAN_LINE_PGM must
be set to 1 for these bits
to be effective
Sets VBI standard to be decoded from
Line 23 (PAL), Line 21 (NTSC)
Sets VBI standard to be decoded from
Line 337 (PAL), Line 285 (NTSC)
MAN_LINE_PGM must
be set to 1 for these bits
to be effective
Sets VBI standard to be decoded from
Line 24 (PAL), Line 22 (NTSC)
VDP_STATUS
(read only)
0
1
Closed captioning not detected
Closed captioning detected
CC_CLEAR resets the
CC_AVL bit
CC_EVEN_FIELD
0
1
Closed captioning decoded from
odd field
Closed captioning decoded from
even field
CGMS_WSS_AVL
0
1
CGMS/WSS not detected
CGMS/WSS detected
CGMS_WSS_CLEAR resets
the CGMS_WSS_AVL bit
Reserved
0
GS_PDC_VPS_UTC_AVL
0
1
GS/PDC/VPS/UTC not detected
GS/PDC/VPS/UTC detected
GS_PDC_VPS_UTC_CLEAR
resets the
GS_PDC_VPS_UTC_AVL
bit
GS_DATA_TYPE
VITC_AVL
0
1
Gemstar_1× detected
Gemstar_2× detected
VITC not detected
VITC detected
0
1
VITC_CLEAR resets the
VITC_AVL bit
TTXT_AVL
0
1
Teletext not detected
Teletext detected
VDP_STATUS_CLEAR
(write only)
CC_CLEAR
0
1
Does not reinitialize the CCAP readback
registers
This is a self-clearing bit
This is a self-clearing bit
Reinitializes the CCAP readback registers
Reserved
0
CGMS_WSS_CLEAR
0
1
Does not reinitialize the CGMS/WSS
readback registers
Reinitializes the CGMS/WSS readback
registers
Reserved
0
GS_PDC_VPS_UTC_CLEAR
0
1
Does not reinitialize the GS/PDC/VPS/
UTC readback registers
This is a self-clearing bit
This is a self-clearing bit
Refreshes the GS/PDC/VPS/UTC
readback registers
Reserved
0
VITC_CLEAR
0
1
Does not reinitialize the VITC readback
registers
Reinitializes the VITC readback registers
Reserved
0
x
0x79
0x7A
0x7D
VDP_CCAP_DATA_0
(read only)
VDP_CCAP_DATA_1
(read only)
VDP_CGMS_WSS_DATA_0
(read only)
CCAP_BYTE_1[7:0]
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Decoded Byte 1 of CCAP
CCAP_BYTE_2[7:0]
x
Decoded Byte 2 of CCAP
CGMS_CRC[5:2]
Reserved
CGMS_WSS[13:8]
CGMS_CRC[1:0]
CGMS_WSS[7:0]
Decoded CRC sequence for CGMS
0
0
0
x
0
x
0x7E
VDP_CGMS_WSS_DATA_1
(read only)
x
x
x
x
Decoded CGMS/WSS data
Decoded CRC sequence for CGMS
Decoded CGMS/WSS data
x
x
x
x
0x7F
0x84
0x85
VDP_CGMS_WSS_DATA_2
(read only)
VDP_GS_VPS_PDC_UTC_0
(read only)
VDP_GS_VPS_PDC_UTC_1
(read only)
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
GS_VPS_PDC_UTC_BYTE_0[7:0]
GS_VPS_PDC_UTC_BYTE_1[7:0]
x
x
x
x
Decoded Gemstar/VPS/PDC/UTC data
Decoded Gemstar/VPS/PDC/UTC data
Rev. G | Page 104 of 120
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