ADV7125
Table 7. Typical Video Output Truth Table (RSET = 530 Ω, RLOAD = 37.5 Ω)
IOG (mA)
IOR/IOB (mA)
SYNC
BLANK
Video Output Level
White Level
Video
Video to BLANK
Black Level
Black to BLANK
BLANK Level
SYNC Level
IOG (mA)
IOR/IOB (mA)
DAC Input Data
±xFFH
Data
26.±
Video + 7.2
±
18.67
Video
±
1
1
±
1
±
1
±
1
1
1
1
1
±
±
18.67 − Video
18.67 − Video
18.67
18.67 − Video
18.67 − Video
18.67
Video
7.2
±
Video
Data
±
±
±
±
±x±±H
18.67
18.67
±x±±H
7.2
±
18.67
18.67
±xXXH (don’t care)
±xXXH (don’t care)
18.67
18.67
low glitch. The on-board operational amplifier stabilizes the
full-scale output current against temperature and power supply
variations.
VIDEO SYNCHRONIZATION AND CONTROL
SYNC
The ADV7125 has a single composite sync (
) input
control. Many graphics processors and CRT controllers have the
ability to generate horizontal sync (HSYNC), vertical sync
ANALOG OUTPUTS
SYNC
(VSYNC), and composite
In a graphics system that does not automatically generate a
SYNC
.
The ADV7125 has three analog outputs, corresponding to the
red, green, and blue video signals.
composite
signal, the inclusion of some additional logic
SYNC
The red, green, and blue analog outputs of the ADV7125 are
high impedance current sources. Each one of these three RGB
current outputs is capable of directly driving a 37.5 ꢁ load, such
as a doubly terminated 75 ꢁ coaxial cable. Figure 6 shows the
required configuration for each of the three RGB outputs
connected into a doubly terminated 75 ꢁ load. This arrangement
develops RS-343A video output voltage levels across a 75 ꢁ
monitor.
circuitry enables the generation of a composite
signal.
The sync current is internally connected directly to the IOG
output, thus encoding video synchronization information onto
the green video channel. If it is not required to encode sync
information onto the ADV7125, the
to logic low.
SYNC
input should be tied
REFERENCE INPUT
A suggested method of driving RS-170 video levels into a 75 ꢁ
monitor is shown in Figure 7. The output current levels of the
DACs remain unchanged, but the source termination resistance,
ZS, on each of the three DACs is increased from 75 ꢁ to 150 ꢁ.
IOR, IOG, IOB
The ADV7125 contains an on-board voltage reference. The VREF
pin should be connected as shown in Figure 10.
A resistance, RSET, connected between the RSET pin and GND,
determines the amplitude of the output video level according to
Equation 1 and Equation 2 for the ADV7125.
Z
= 75Ω
0
DACs
(CABLE)
IOG (mA) = 11,444.8 × VREF (V)/RSET (Ω)
IOR, IOB (mA) = 7989.6 × VREF (V)/RSET (Ω)
(1)
(2)
Z
= 75Ω
S
Z
= 75Ω
L
(SOURCE
TERMINATION)
(MONITOR)
SYNC
Equation 1 applies to the ADV7125 only, when
is being
is not being encoded onto the green channel,
Equation 1 is similar to Equation 2.
TERMINATION REPEATED THREE TIMES
FOR RED, GREEN, AND BLUE DACs
SYNC
used. If
Figure 6. Analog Output Termination for RS-343A
Using a variable value of RSET allows for accurate adjustment of
the analog output video levels. Use of a fixed 560 ꢁ RSET resistor
yields the analog output levels quoted in the Specifications section.
These values typically correspond to the RS-343A video wave-
form values, as shown in Figure 5.
IOR, IOG, IOB
Z
= 75Ω
0
DACs
Z
(CABLE)
= 150Ω
(SOURCE
TERMINATION)
S
Z
= 75Ω
L
(MONITOR)
DACS
TERMINATION REPEATED THREE TIMES
FOR RED, GREEN, AND BLUE DACs
The ADV7125 contains three matched 8-bit DACs. The DACs
are designed using an advanced, high speed, segmented architec-
ture. The bit currents corresponding to each digital input are
routed to either the analog output (bit = 1) or GND (bit = 0)
by a sophisticated decoding scheme. Because all this circuitry
is on one monolithic device, matching between the three DACs
is optimized. As well as matching, the use of identical current
sources in a monolithic design guarantees monotonicity and
Figure 7. Analog Output Termination for RS-170
More detailed information regarding load terminations for
various output configurations, including RS-343A and RS-170,
is available in the AN-205 Application Note, Video Formats and
Required Load Terminations, available from Analog Devices at
www.analog.com.
Rev. C | Page 12 of 16
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