ADV7125
3.3 V ELECTRICAL CHARACTERISTICS
VAA = 3.0 V to 3.6 V, VREF = 1.235 V, RSET = 560 Ω, CL = 10 pF. All specifications TMIN to TMAX,1 unless otherwise noted, TJ MAX = 110°C.
Table 2.
Parameter2
Min
Typ
Max
Unit
Test Conditions1
STATIC PERFORMANCE
Resolution (Each DAC)
Integral Nonlinearity (BSL)
Differential Nonlinearity
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current, IIN
8
+1
+1
Bits
LSB
LSB
RSET = 68± Ω
RSET = 68± Ω
RSET = 68± Ω
−1
−1
±±.ꢁ
±±.2ꢁ
2.±
−1
V
V
μA
μA
pF
±.8
+1
VIN = ±.± V or VDD
PSAVE Pull-Up Current
Input Capacitance, CIN
ANALOG OUTPUTS
2±
1±
Green DAC, SYNC = high
RGB DAC, SYNC = low
Output Current
2.±
2.±
26.ꢁ
18.ꢁ
mA
mA
%
V
kΩ
pF
% FSR
% FSR
DAC-to-DAC Matching
Output Compliance Range, VOC
Output Impedance, ROUT
Output Capacitance, COUT
Offset Error
1.±
±
1.ꢀ
±
7±
1±
±
Tested with DAC output = ± V
FSR = 18.62 mA
Gain Error3
±
VOLTAGE REFERENCE, EXTERNAL
Reference Range, VREF
VOLTAGE REFERENCE, INTERNAL
Voltage Reference, VREF
POWER DISSIPATION
1.12
1.23ꢁ
1.23ꢁ
1.3ꢁ
V
V
Digital Supply Currentꢀ
2.2
6.ꢁ
11
16
67
8
ꢁ.±
12.±
1ꢁ
mA
mA
mA
mA
mA
mA
mA
%/%
fCLK = ꢁ± MHz
fCLK = 1ꢀ± MHz
fCLK = 2ꢀ± MHz
fCLK = 33± MHz
RSET = ꢁ6± Ω
RSET = ꢀ933 Ω
PSAVE = low, digital, and control inputs at VDD
Analog Supply Current
72
Standby Supply Current
2.1
±.1
ꢁ.±
±.ꢁ
Power Supply Rejection Ratio
1 Temperature range TMIN to TMAX: −ꢀ±°C to +8ꢁ°C at ꢁ± MHz and 1ꢀ± MHz, ±°C to +7±°C at 2ꢀ± MHz and 33± MHz.
2 These max/min specifications are guaranteed by characterization in the 3.± V to 3.6 V range.
3 Gain error = ((Measured (FSC)/Ideal (FSC) −1) × 1±±), where Ideal = VREF/RSET × K × (±xFFH) × ꢀ and K = 7.9896.
ꢀ Digital supply is measured with continuous clock that has data input corresponding to a ramp pattern and with an input level at ± V and VDD
.
Rev. C | Page ꢀ of 16
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