ADV7123
SPECIFICATIONS
5 V SPECIFICATIONS
VAA = 5 V 5ꢀ, VREF = 1.235 V, RSET = 560 Ω, CL = 10 pF. All specifications TMIN to TMAX,1 unless otherwise noted, TJ MAX = 110°C.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions1
STATIC PERFORMANCE
Resolution (Each DAC)
Integral Nonlinearity (BSL)
Differential Nonlinearity
10
−1
−1
Bits
LSB
LSB
0.4
0.2ꢀ
+1
+1
Guaranteed Monotonic
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current, IIN
PSAVE Pull-Up Current
Input Capacitance, CIN
ANALOG OUTPUTS
2
V
V
μA
μA
pF
0.8
+1
−1
VIN = 0.0 V or VDD
20
10
Green DAC, SYNC = high
RGB DAC, SYNC = low
Output Current
2.0
2.0
26.ꢀ
18.ꢀ
ꢀ
mA
mA
%
V
kΩ
pF
% FSR
% FSR
DAC-to-DAC Matching
Output Compliance Range, VOC
Output Impedance, ROUT
Output Capacitance, COUT
Offset Error
1.0
0
1.4
100
10
IOUT = 0 mA
Tested with DAC output = 0 V
FSR = 17.62 mA
−0.02ꢀ
−ꢀ.0
+0.02ꢀ
+ꢀ.0
Gain Error2
VOLTAGE REFERENCE, EXTERNAL AND
INTERNAL
Reference Range, VREF
POWER DISSIPATION
Digital Supply Current3
1.12
1.23ꢀ
1.3ꢀ
V
3.4
10.ꢀ
18
67
8
9
mA
mA
mA
mA
mA
mA
%/%
fCLK = ꢀ0 MHz
fCLK = 140 MHz
fCLK = 240 MHz
RSET = ꢀ60 Ω
RSET = 4933 Ω
PSAVE = low, digital, and control inputs at VDD
1ꢀ
2ꢀ
72
Analog Supply Current
Standby Supply Current4
2.1
0.1
ꢀ.0
0.ꢀ
Power Supply Rejection Ratio
1 Temperature range TMIN to TMAX: −40°C to +8ꢀ°C at ꢀ0 MHz and 140 MHz, 0°C to 70°C at 240 MHz and 330 MHz.
2 Gain error = {(Measured (FSC)/Ideal (FSC) − 1) × 100}, where Ideal = VREF /RSET × K × (0x3FFH) and K = 7.9896.
3 Digital supply is measured with a continuous clock that has data input corresponding to a ramp pattern and with an input level at 0 V and VDD
4 These maximum/minimum specifications are guaranteed by characterization to be over the 4.7ꢀ V to ꢀ.2ꢀ V range.
.
Rev. D | Page 3 of 24
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