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ADV7123KSTZ50 参数 Datasheet PDF下载

ADV7123KSTZ50图片预览
型号: ADV7123KSTZ50
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS , 330 MHz的三路10位高速视频DAC [CMOS, 330 MHz Triple 10-Bit High Speed Video DAC]
分类和应用: 转换器数模转换器PC
文件页数/大小: 24 页 / 340 K
品牌: ADI [ ADI ]
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ADV7123  
Pin No.  
Mnemonic  
Description  
37  
RSET  
A resistor (RSET) connected between this pin and GND controls the magnitude of the full-scale video signal.  
Note that the IRE relationships are maintained, regardless of the full-scale output current. For nominal video  
levels into a doubly terminated 7ꢀ Ω load, RSET = ꢀ30 Ω. The relationship between RSET and the full-scale  
output current on IOG (assuming ISYNC is connected to IOG) is given by:  
RSET (Ω) = 11,44ꢀ × VREF (V)/IOG (mA)  
The relationship between RSET and the full-scale output current on IOR, IOG, and IOB is given by:  
IOG (mA) = 11,44ꢀ × VREF (V)/RSET (Ω) (SYNC being asserted)  
IOR, IOB (mA) = 7989.6 × VREF (V)/RSET (Ω)  
The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC tied  
permanently low.  
38  
PSAVE  
Power Save Control Pin. Reduced power consumption is available on the ADV7123 when this pin is active.  
Rev. D | Page 11 of 24