ADSP-BF531/ADSP-BF532
ELECTRICAL CHARACTERISTICS
Parameter
V
OH
V
OH
V
OH
V
OL
V
OL
I
IH
I
IHP
I
IL
4
I
OZH
I
OZL
C
IN
I
DDHIBERNATE
I
DDDEEPSLEEP
8
I
DDSLEEP
I
DD
_
TYP
I
DD
_
TYP
I
DDRTC
1
2
Test Conditions
High Level Output Voltage
1
High Level Output Voltage
High Level Output Voltage
Low Level Output Voltage
Low Level Output Voltage
High Level Input Current
2
High Level Input Current JTAG
3
Low Level Input Current
Three-State Leakage Current
5
Three-State Leakage Current
Input Capacitance
6
V
DDINT
Current in Hibernate Mode
V
DDINT
Current in Deep Sleep Mode
V
DDINT
Current in Sleep Mode
V
DDINT
Current Dissipation (Typical)
V
DDINT
Current Dissipation (Typical)
V
DDRTC
Current
@ V
DDEXT
= 1.75 V, I
OH
= –0.5 mA
@ V
DDEXT
= 2.25 V, I
OH
= –0.5 mA
@ V
DDEXT
= 3.0 V, I
OH
= –0.5 mA
@ V
DDEXT
= 1.75 V, I
OL
= 2.0 mA
@ V
DDEXT
= 2.25 V/3.0 V, I
OL
= 2.0 mA
@ V
DDEXT
= Maximum, V
IN
= V
DD
Maximum
@ V
DDEXT
= Maximum, V
IN
= V
DD
Maximum
@ V
DDEXT
= Maximum, V
IN
= 0 V
@ V
DDEXT
= Maximum, V
IN
= V
DD
Maximum
@ V
DDEXT
= Maximum, V
IN
= 0 V
f
IN
= 1 MHz, T
AMBIENT
= 25°C, V
IN
= 2.5 V
V
DDEXT
= 3.65 V with voltage regulator off (V
DDINT
= 0 V)
V
DDINT
= 0.8 V, T
JUNCTION
= 25°C
V
DDINT
= 0.8 V, T
JUNCTION
= 25°C
V
DDINT
= 0.8 V, f
IN
= 50 MHz, T
JUNCTION
= 25°C
V
DDINT
= 1.14 V, f
IN
= 400 MHz, T
JUNCTION
= 25°C
V
DDRTC
= 3.3 V, T
JUNCTION
= 25°C
Min Typical Max Unit
1.5
1.9
2.4
0.2
0.4
V
V
V
V
V
10.0 µA
50.0 µA
10.0 µA
10.0 µA
10.0 µA
4
50
7.5
10
20
132
20
8
7
pF
µA
mA
mA
mA
mA
µA
Applies to output and bidirectional pins.
Applies to input pins except JTAG inputs.
3
Applies to JTAG input pins (TCK, TDI, TMS, TRST).
4
Absolute value.
5
Applies to three-statable pins.
6
Applies to all signal pins.
7
Guaranteed, but not tested.
8
See
9
Processor executing 75% dual MAC, 25% ADD with moderate data bus activity.
Rev. D |
Page 21 of 60 |
August 2006
AD [ ANALOG DEVICES ]
