ADSP-BF531/ADSP-BF532
Table 9. Pin Descriptions (Continued)
Driver
Pin Name
Type Function
Type1 Pull-Up/Down Requirement
Parallel Peripheral Interface Port/GPIO
PF0/SPISS
I/O Programmable Flag 0/SPI Slave Select Input
C
C
None
None
PF1/SPISEL1/TMRCLK
I/O Programmable Flag 1/SPI Slave Select
Enable 1/External Timer Reference
PF2/SPISEL2
I/O Programmable Flag 2/SPI Slave Select Enable 2
C
C
None
None
PF3/SPISEL3/PPI_FS3
I/O Programmable Flag 3/SPI Slave Select
Enable 3/PPI Frame Sync 3
PF4/SPISEL4/PPI15
PF5/SPISEL5/PPI14
PF6/SPISEL6/PPI13
PF7/SPISEL7/PPI12
I/O Programmable Flag 4/SPI Slave Select
C
C
C
C
None
None
None
None
Enable 4/PPI 15
I/O Programmable Flag 5/SPI Slave Select
Enable 5/PPI 14
I/O Programmable Flag 6/SPI Slave Select
Enable 6/PPI 13
I/O Programmable Flag 7/SPI Slave Select
Enable 7/PPI 12
PF8/PPI11
PF9/PPI10
PF10/PPI9
PF11/PPI8
PF12/PPI7
PF13/PPI6
PF14/PPI5
PF15/PPI4
PPI3–0
I/O Programmable Flag 8/PPI 11
I/O Programmable Flag 9/PPI 10
I/O Programmable Flag 10/PPI 9
I/O Programmable Flag 11/PPI 8
I/O Programmable Flag 12/PPI 7
I/O Programmable Flag 13/PPI 6
I/O Programmable Flag 14/PPI 5
I/O Programmable Flag 15/PPI 4
I/O PPI3–0
C
C
C
C
C
C
C
C
C
C
None
None
None
None
None
None
None
None
None
None
PPI_CLK
JTAG Port
TCK
I
PPI Clock
I
JTAG Clock
Internal Pull-down
None
TDO
O
I
JTAG Serial Data Out
JTAG Serial Data In
JTAG Mode Select
JTAG Reset
C
TDI
Internal Pull-down
Internal Pull-down
External Pull-down If JTAG Not Used
None
TMS
I
TRST
I
EMU
O
Emulation Output
C
SPI Port
MOSI
I/O Master Out Slave In
I/O Master In Slave Out
C
C
None
MISO
Pull HIGH Through a 4.7 kΩ Resistor
if Booting via the SPI Port.
SCK
I/O SPI Clock
D
None
Rev. D
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Page 18 of 60
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August 2006
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