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ADSP-21062KS-160 参数 Datasheet PDF下载

ADSP-21062KS-160图片预览
型号: ADSP-21062KS-160
PDF下载: 下载PDF文件 查看货源
内容描述: ADSP- 2106x SHARC DSP单片机系列 [ADSP-2106x SHARC DSP Microcomputer Family]
分类和应用:
文件页数/大小: 48 页 / 368 K
品牌: ADI [ ADI ]
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ADSP-21062/ADSP-21062L  
Figure 6 shows JTAG scan path connections for systems that  
contain multiple ADSP-2106x processors.  
EMU should be treated as critical signals in terms of skew,  
and should be laid out as short as possible on your board. If  
TCK, TMS, and CLKIN are driving a large number of ADSP-  
21062s (more than eight) in your system, then treat them as a  
“clock tree” using multiple drivers to minimize skew. (See  
Figure 7 “JTAG Clock Tree” and “Clock Distribution” in the  
“High Frequency Design Considerations” section of the ADSP-  
2106x User’s Manual, Second Edition.)  
Connecting CLKIN to Pin 4 of the EZ-ICE header is optional.  
The emulator only uses CLKIN when directed to perform  
operations such as starting, stopping, and single-stepping mul-  
tiple ADSP-2106xs in a synchronous manner. If you do not need  
these operations to occur synchronously on the multiple proces-  
sors, simply tie Pin 4 of the EZ-ICE header to ground.  
If synchronous multiprocessor operations are not needed (i.e.,  
CLKIN is not connected), just use appropriate parallel termi-  
nation on TCK and TMS. TDI, TDO, EMU and TRST are  
not critical signals in terms of skew.  
If synchronous multiprocessor operations are needed and  
CLKIN is connected, clock skew between the multiple ADSP-  
21062 processors and the CLKIN pin on the EZ-ICE header  
must be minimal. If the skew is too large, synchronous operations  
may be off by one or more cycles between processors. For syn-  
chronous multiprocessor operation TCK, TMS, CLKIN and  
For complete information on the SHARC EZ-ICE, see the  
ADSP-21000 Family JTAG EZ-ICE User's Guide and Reference.  
TDI  
TDO  
TDI  
TDO  
TDI  
TDO  
5k  
*
TDI  
TDO  
TDI  
TDO  
TDI  
TDO  
TDI  
5k⍀  
*
EMU  
TCK  
TMS  
TRST  
TDO  
SYSTEM  
CLKIN  
CLKIN  
EMU  
*OPEN DRAIN DRIVER OR EQUIVALENT, i.e.,  
Figure 7. JTAG Clocktree for Multiple ADSP-2106x Systems  
REV. C  
–12–  
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