ADM696/ADM697
APPLICATIONS INFORMATION
Increasing the Drive Current (ADM696)
If the continuous output current requirements at V
OUT
exceeds
100 mA or if a lower V
CC
–V
OUT
voltage differential is desired,
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output (ADM696)
can directly drive the base of the external transistor.
PNP TRANSISTOR
+5V
INPUT
POWER
0.1µF
0.1µF
This circuit is not entirely foolproof, and it is possible that a
software fault could erroneously 3-state the buffer. This would
then prevent the ADM69x from detecting that the microproces-
sor is no longer operating correctly. In most cases a better
+7V TO +15V
INPUT
POWER
R1
1.3V
PFI
PFO
TO
µP NMI
7805
+5V
V
CC
R4
V
CC
V
BATTERY
BATT
BATT
ON
V
OUT
R2
ADM69x
ADM696
R
R
1
1
V
H
= 1.3V 1+ ––– + –––
R
R
R3
(
)
)
2
3
R
1
R
1
(5V – 1.3V)
V
L
= 1.3V 1+ ––– – –––––––––––––
R
2
1.3V (R
3 +
R
4
)
(
Figure 14. Increasing the Drive Current
Using a Rechargeable Battery for Backup (ADM696)
R
1
HYSTERESIS V
H
– V
L
= 5V
–––
R
ASSUMING R
< <
R THEN
4
3
(
)
2
If a capacitor or a rechargeable battery is used for backup, then
the charging resistor should be connected to V
OUT
since this
eliminates the discharge path that would exist during power-
down if the resistor is connected to V
CC
.
+5V
INPUT
POWER
I=
0.1µF
R
0.1µF
V
OUT
– V
BATT
R
Figure 16. Adding Hysteresis to the Power Fail Comparator
V
CC
V
BATT
RECHARGABLE
BATTERY
V
OUT
method is to extend the watchdog period rather than disabling
the watchdog. This may be done under program control using
the circuit shown in Figure 17b. When the control input is high,
the OSC SEL pin is low and the watchdog timeout is set by the
external capacitor. A 0.01
µF
capacitor sets a watchdog timeout
delay of 100 s. When the control input is low, the OSC SEL pin
is driven high, selecting the internal oscillator. The 100 ms or
the 1.6 s period is chosen, depending on which diode in Fig-
ure 17b is used. With D1 inserted, the internal timeout is set at
100 ms while with D2 inserted the timeout is set at 1.6 s.
WATCHDOG
STROBE
WDI
ADM696
ADM69x
Figure 15. Rechargeable Battery
Adding Hysteresis to the Power Fail Comparator
CONTROL
INPUT
For increased noise immunity, hysteresis may be added to the
power fail comparator. Since the comparator circuit is nonin-
verting, hysteresis can be added simply by connecting a resistor
between the PFO output and the PFI input as shown in Fig-
ure 16. When PFO is low, resistor R3 sinks current from the
summing junction at the PFI pin. When PFO is high, the series
combination of R3 and R4 source current into the PFI summing
junction. This results in differing trip levels for the comparator.
Alternate Watchdog Input Drive Circuits
Figure 17a. Programming the Watchdog Input
CONTROL
INPUT*
D1
D2
OSC SEL
ADM69x
OSC IN
The watchdog feature can be enabled and disabled under pro-
gram control by driving WDI with a 3-state buffer (Figure 17a).
When three-stated, the WDI input will float thereby disabling
the watchdog timer.
*LOW = INTERNAL TIMEOUT
HIGH = EXTERNAL TIMEOUT
Figure 17b. Programming the Watchdog Input
REV. 0
–9–
AD [ ANALOG DEVICES ]
