ADM696/ADM697
This application also shows an optional, external transistor
which may be used to provide in excess of 100 mA current on
V
OUT
. When V
CC
is higher than V
BATT
, the BATT ON output
goes low, providing 25 mA of base drive for the external PNP
transistor. The maximum current available is dependent on the
power rating of the external transistor.
RAM Write Protection
The ADM697
CE
OUT
line drives the Chip Select inputs of the
CMOS RAM.
CE
OUT
follows
CE
IN
as long as LL
IN
is above the
reset threshold. If LL
IN
falls below the reset threshold,
CE
OUT
goes high, independent of the logic level at
CE
IN
. This prevents
the microprocessor from writing erroneous data into RAM dur-
ing power-up, power-down, brownouts and momentary power
interruptions.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Pin Plastic DIP (N-16)
1
6
PIN 1
1
0.840 (21.33)
0.745 (18.93)
0.210
(5.33)
0.200 (5.05)
0.125 (3.18)
0.060 (1.52)
0.015 (0.38)
8
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
9
0.280 (7.11)
0.240 (6.10)
0.150
(3.81)
0.015 (0.381)
0.008 (0.204)
0.022 (0.558)
0.014 (0.356)
0.100 (2.54)
BSC
0.070 (1.77)
0.045 (1.15)
SEATING
PLANE
16-Pin Cerdip (Q-16)
16
PIN 1
1
0.840 (21.34) MAX
0.200
(5.08)
MAX
8
0.320 (8.13)
0.290 (7.37)
9
0.310 (7.87)
0.220 (5.59)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.022 (0.558)
0.014 (0.356)
0.100 (2.54)
BSC
0.070 (1.78)
0.30 (0.76)
16-Lead SOIC (R-16)
16
9
0.299
(7.60)
0.419
(10.65)
1
8
0.413 (10.50)
0.012
(0.3)
0.104
(2.65)
0.05 (1.27)
REF
0.019 (0.49)
0.030
(0.75)
0.013
(0.32)
0.042
(1.07)
REV. 0
–11–