ADM3485E
100
90
1.20
1.15
80
70
1.10
1.05
I
(mA) DE = V , RE = X
CC
CC
60
50
40
1.00
0.95
0.90
I
(mA) RE = LO, DE = LO
CC
0.85
30
0.80
0.75
20
10
I
(mA)
60
CC
0
–40
0.70
–50
–30
–20
–10
10
30
50
70
90
110
0
20
40
80
TEMPERATURE – ꢂC
TEMPERATURE – ꢂC
Figure 19. Supply Current vs. Temperature
Figure 20. Shutdown Current vs. Temperature
Table I. Comparison of RS-422 and RS-485 Interface Standards
ESD/EFT TRANSIENT PROTECTION SCHEME
The ADM3485E uses protective clamping structures on its
inputs and outputs that clamp the voltage to a safe level and
dissipate the energy present in ESD (Electrostatic) and EFT
(Electrical Fast Transients) discharges.
Specification
RS-422
RS-485
Transmission Type
Maximum Data Rate
Differential
10 MB/s
4000 ft.
2 V
100 Ω
4 kΩ min
200 mV
Differential
10 MB/s
4000 ft.
1.5 V
54 Ω
12 kΩ min
200 mV
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
The protection structure achieves ESD protection up to 8 kV
according to IEC1000-4-2, and EFT protection up to 2 kV on
all I-O lines.
ESD TESTING
Two coupling methods are used for ESD testing, contact dis-
charge and air-gap discharge. Contact discharge calls for a di-
rect connection to the unit being tested. Air-gap discharge uses
a higher test voltage but does not make direct contact with the
unit under test. With air discharge, the discharge gun is moved
toward the unit under test, developing an arc across the air gap,
hence the term air-discharge. This method is influenced by hu-
midity, temperature, barometric pressure, distance and rate of
closure of the discharge gun. The contact-discharge method,
while less realistic, is more repeatable and is gaining acceptance
and preference over the air-gap method.
–7 V to +7 V –7 V to +12 V
No. of Drivers/Receivers Per Line 1/10
32/32
Table II. Transmitting Truth Table
Transmitting
DI
Inputs
DE
Outputs
RE
B
A
X
X
0
1
1
0
0
1
0
X
X
0
1
Hi-Z
Hi-Z
1
0
Hi-Z
Hi-Z
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or heat-
ing. Even if catastrophic failure does not occur immediately, the
device may suffer from parametric degradation, which may
result in degraded performance. The cumulative effects of con-
tinuous exposure can eventually lead to complete failure.
1
Table III. Receiving Truth Table
Receiving
Inputs
Outputs
RO
RE
DE
A–B
I-O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I-O cable can result in a static dis-
charge that can damage or completely destroy the interface
product connected to the I-O port.
0
0
0
1
X
X
X
X
> +0.2 V
< –0.2 V
Inputs O/C
X
1
0
1
Hi-Z
It is extremely important, therefore, to have high levels of ESD
protection on the I-O lines.
It is possible that the ESD discharge could induce latchup in the
device under test, so it is important that ESD testing on the I-O
pins be carried out while device power is applied. This type of
testing is more representative of a real-world I-O discharge
where the equipment is operating normally when the discharge
occurs.
REV. A
–8–
ADI [ ADI ]
