ADM1025/ADM1025A
PIN FUNCTION DESCRIPTIONS
Pin
No. Mnemonic
1
2
3
4
5
6
7
8
9
10
11
SDA
SCL
GND
V
CC
VID0
VID1
VID2
VID3
D–/NTI
D+
12 V
IN
/VID4
Description
Digital I/O. Serial bus bidirectional data. Open-drain output.
Digital Input. Serial bus clock.
System Ground.
Power. Can be powered by +3.3 V standby power if monitoring in low power states is required.
This pin also serves as the analog input to monitor V
CC
.
Digital Input. Core voltage ID readouts from the processor. This value is read into the VID0–VID3
Status Register. It has an on-chip 100 kΩ pull-up resistor (ADM1025 only).
Digital Input. Core voltage ID readouts from the processor. This value is read into the VID0–VID3
Status Register. It has an on-chip 100 kΩ pull-up resistor (ADM1025 only).
Digital Input. Core voltage ID readouts from the processor. This value is read into the VID0–VID3
Status Register. It has an on-chip 100 kΩ pull-up resistor (ADM1025 only).
Digital Input. Core voltage ID readouts from the processor. This value is read into the VID0–VID3
Status Register. It has an on-chip 100 kΩ pull-up resistor (ADM1025 only).
Analog/Digital Input. Connected to cathode of external temperature sensing diode. If held high at
power-up, initiates NAND tree test mode.
Analog Input. Connected to anode of external temperature sensing diode.
Programmable Analog/Digital Input. Defaults to 12 V
IN
analog input at power-up, but may be pro-
grammed as VID4 Core Voltage ID readout from the processor. This value is read into the VID4
Status Register. In analog 12 V
IN
mode it has an on-chip voltage attenuator. In VID4 mode it has an
on-chip 300 kΩ pull-up resistor.
Analog Input. Monitors 5 V supply.
Analog Input. Monitors 3.3 V supply.
Analog Input. Monitors 2.5 V supply.
Analog Input. Monitors processor core voltage (0 V to 3.0 V).
Programmable Digital I/O. The lowest order programmable bit of the SMBus Address, sampled on
SMB activity as a three-state input. Can also be configured to give a minimum 20 ms low reset
output pulse. Alternatively, can be programmed as an interrupt output for temperature/voltage
interrupts. Functions as the output of the NAND tree in NAND tree test mode.
PIN CONFIGURATION
12
13
14
15
16
5 V
IN
3.3 V
IN
2.5 V
IN
V
CCPIN
ADD/RST/INT/NTO
SDA
1
SCL
2
GND
3
V
CC 4
16
ADD/RST/INT/NTO
15
V
CCPIN
13
3.3V
IN
TOP VIEW
VID0
5
(Not to Scale)
12
5V
IN
ADM1025/
ADM1025A
14
2.5V
IN
VID1
6
VID2
7
VID3
8
11
12V
IN
/VID4
10
D+
9
D–/NTI
–4–
REV. A
AD [ ANALOG DEVICES ]
