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ADM1025ARQ 参数 Datasheet PDF下载

ADM1025ARQ图片预览
型号: ADM1025ARQ
PDF下载: 下载PDF文件 查看货源
内容描述: 低价PC硬件监控ASIC [Low-Cost PC Hardware Monitor ASIC]
分类和应用: 光电二极管监控输入元件PC
文件页数/大小: 16 页 / 164 K
品牌: AD [ ANALOG DEVICES ]
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ADM1025/ADM1025A–SPECIFICATIONS
(T = T
A
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted.)
Unit
V
mA
µA
°C
°C
°C
°C
°C
µA
µA
Test Conditions/Comments
(Note 1)
Interface Inactive, ADC Active
Standby Mode (Note 2)
P
arameter
POWER SUPPLY
Supply Voltage, V
CC
Supply Current, I
CC
TEMPERATURE-TO-DIGITAL CONVERTER
Internal Sensor Accuracy
Resolution
External Diode Sensor Accuracy
Resolution
Remote Sensor Source Current
ANALOG-TO-DIGITAL CONVERTER
(INCLUDING MUX AND ATTENUATORS)
Total Unadjusted Error, TUE
Differential Nonlinearity, DNL
Power Supply Sensitivity
Conversion Time (Analog Input or Internal Temperature)
Conversion Time (External Temperature)
Input Resistance (2.5 V, 3.3 V, 5 V, 12 V, V
CCPIN
)
OPEN-DRAIN DIGITAL OUTPUT ADD/RST/INT/NTO
Output Low Voltage, V
OL
High Level Output Leakage Current, I
OH
RST
Pulsewidth
OPEN-DRAIN SERIAL DATA BUS OUTPUT (SDA)
Output Low Voltage, V
OL
High Level Output Leakage Current, I
OH
SERIAL BUS DIGITAL INPUTS (SCL, SDA)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
DIGITAL INPUT LOGIC LEVELS
(ADD, VID0–VID4, NTI)
5
VID0–3 Input Resistance
VID4 Input Resistance
Input High Voltage, V
IH6
Input Low Voltage, V
IL6
DIGITAL INPUT LEAKAGE CURRENT
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
SERIAL BUS TIMING
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free Time, t
BUF
Start Setup Time, t
SU:STA
Start Hold Time, t
HD:STA
Stop Condition Setup Time t
SU:STO
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
R
SCL, SDA Fall Time, t
F
Data Setup Time, t
SU:DAT
Data Hold Time, t
HD:DAT
Min
3.0
Typ
3.30
1.4
32
Max
5.5
2.5
500
±
3
1
±
5
±
3
1
180
11
60°C
T
A
100°C; V
CC
= 3.3 V
High Level
Low Level
100
±
1
11.6
34.8
140
±
2
±
1
250
0.4
1
45
0.4
1
%
LSB
%/V
ms
ms
kΩ
V
µA
ms
V
µA
V
V
mV
(Note 3)
(Note 4)
(Note 4)
0.1
20
I
OUT
= –6.0 mA; V
CC
= 3 V
V
OUT
= V
CC
; V
CC
= 3 V
0.1
2.1
I
OUT
= –6.0 mA; V
CC
= 3 V
V
OUT
= V
CC
0.8
500
100
300
100
2.1
0.8
–1
1
5
400
50
1.3
600
600
600
1.3
0.6
300
300
100
300
kΩ
kΩ
kΩ
V
V
µA
µA
pF
kHz
ns
µs
ns
ns
ns
µs
µs
ns
ns
ns
ns
ADM1025 Only
ADM1025 Only
ADM1025A
V
IN
= V
CC
V
IN
= 0
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
See Figure 1
NOTES
1
All voltages are measured with respect to GND, unless otherwise specified.
2
Typicals are at T
A
= 25°C and represent most likely parametric norm. Shutdown current typ is measured with V
CC
= 3.3 V.
3
TUE (Total Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC, multiplexer and on-chip input attenuators, including an external series input
protection resistor value between zero and 1 kΩ.
4
Total monitoring cycle time is nominally 114.4 ms. Monitoring Cycle consists of 6 Voltage + 1 Internal Temperature + 1 External Temperature readings.
5
ADD is a three-state input that may be pulled high, low or left open-circuit.
6
Timing specifications are tested at logic levels of V
IL
= 0.8 V for a falling edge and V
IH
= 2.2 V for a rising edge.
Specifications subject to change without notice.
–2–
REV. A