AD9830–SPECIFICATIONS
Parameter
SIGNAL DAC SPECIFICATIONS
Resolution
Update Rate (f
MAX
)
I
OUT
Full Scale
Output Compliance
DC Accuracy
Integral Nonlinearity
Differential Nonlinearity
DDS SPECIFICATIONS
2
Dynamic Specifications
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range (SFDR)
3
Narrow Band
(± 50 kHz)
(± 200 kHz)
Wide Band (± 2 MHz)
Clock Feedthrough
Wake Up Time
Power-Down Option
VOLTAGE REFERENCE
Internal Reference @ +25°C
T
MIN
to T
MAX
REFIN Input Impedance
Reference TC
REFOUT Impedance
LOGIC INPUTS
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
I
INH
, Input Current
C
IN
, Input Capacitance
POWER SUPPLIES
AVDD
DVDD
I
AA
I
DD
I
AA
+ I
DD4
Low Power Sleep Mode
5
1
(V
DD
= +5 V
5%; AGND = DGND = 0 V; T
A
= T
MIN
to T
MAX
; REFIN = REFOUT;
R
SET
= 1 k ; R
LOAD
= 51 for IOUT and
IOUT
unless otherwise noted)
Units
Bits
MSPS max
mA max
V max
LSB typ
LSB typ
Test Conditions/Comments
AD9830A
10
50
20
1
±
1
±
0.5
50
–53
dB min
dBc max
f
MCLK
= f
MAX
, f
OUT
= 2 MHz
f
MCLK
= f
MAX
, f
OUT
= 2 MHz
f
MCLK
= 6.25 MHz, f
OUT
= 2.11 MHz
–72
–68
–50
–55
1
Yes
1.21
1.21
±
7%
10
100
300
V
DD
–0.9
0.9
10
10
4.75/5.25
4.75/5.25
25
6 + 0.5/MHz
60
0.25
1
dBc min
dBc min
dBc min
dBc typ
ms typ
Volts typ
Volts min/max
MΩ typ
ppm/°C typ
Ω
typ
V min
V max
µA
max
pF max
f
OUT
= 2 MHz
V min/V max
V min/V max
mA max
mA typ
mA max
mA typ
mA max
1 MΩ Resistor Tied Between
REFOUT and AGND
NOTES
1
Operating temperature range is as follows: A Version: –40°C to +85°C.
2
All dynamic specifications are measured using IOUT. 100% production tested.
3
f
MCLK
= 6.25 MHz, Frequency Word = 5671C71C HEX, f
OUT
= 2.11 MHz.
4
Measured with the digital inputs static and equal to 0 V or DVDD.
5
The Low Power Sleep Mode current is 2 mA typically when a 1 MΩ resistor is
not tied from REFOUT to AGND.
The AD9830 is tested with a capacitive load of 50 pF. The part can be operated
with higher capacitive loads, but the magnitude of the analog output will be attenu-
ated. For example, a 10 MHz output signal will be attenuated by 3 dB when the
load capacitance equals 250 pF.
Specifications subject to change without notice.
10nF
R
SET
1kΩ
REFOUT
REFIN
FS
ADJUST
FULL-SCALE
CONTROL
COMP
AVDD
10nF
ON-BOARD
REFERENCE
IOUT
12
SIN
ROM
10-BIT
DAC
IOUT
51Ω
51Ω
50pF
50pF
Figure 1. Test Circuit with Which Specifications Are
Tested
–2–
REV. A
AD [ ANALOG DEVICES ]
