AD9712B/AD9713B
PIN DESCRIPTIONS
Pin #
Name
Function
1–10
11
D
2
–D
11
D
12
(LSB)
Ten bits of twelve-bit digital input word.
Least Significant Bit (LSB) of digital input word.
Input Coding vs. Current Output
Input Code D
1
–D
12
I
OUT
(mA)
I
OUT
(mA)
1111111111
0000000000
–20.475
0
0
–20.475
12
13
14
15
16
17
DIGITAL –V
S
ANALOG RETURN
I
OUT
ANALOG –V
S
I
OUT
REFERENCE IN
18
19
20
21
22
23
24
25
26
27
28
CONTROL AMP OUT
CONTROL AMP IN
REFERENCE OUT
DIGITAL –V
S
REFERENCE GROUND
DIGITAL +V
S
R
SET
ANALOG –V
S
LATCH ENABLE
DIGITAL GROUND
D
1
(MSB)
One of two negative digital supply pins; nominally –5.2 V.
Analog ground return. This point and the reference side of the DAC load resistors should be
connected to the same potential (nominally ground).
Analog current output; full-scale output occurs with digital inputs at all “1.”
One of two negative analog supply pins; nominally –5.2 V.
Complementary analog current output; zero scale output occurs with digital inputs at all “1.”
Normally connected to CONTROL AMP OUT (Pin 18). Direct line to DAC current source
network. Voltage changes at this point have a direct effect on the full-scale output value of
unit. Full-scale current output = 128 (Reference voltage/R
SET
) when using internal amplifier.
Normally connected to REFERENCE INPUT (Pin 17). Output of internal control amplifier,
which provides a temperature-compensated drive level to the current switch network.
Normally connected to REFERENCE OUT (Pin 20) if not connected to external reference.
Normally connected to CONTROL AMP IN (Pin 19). Internal voltage reference, nominally
–1.18 V.
One of two negative digital supply pins; nominally –5.2 V.
Ground return for the internal voltage reference and amplifier.
Positive digital supply pin, used only on the AD9713B; nominally +5 V. No connection to this
pin on AD9712B.
Connection for external resistance reference. Full-scale current out = 128 (Reference voltage/
R
SET
) when using internal amplifier. Nominally 7.5 kΩ.
One of two negative analog supply pins; nominally –5.2 V.
Transparent latch control line. Register is transparent when LATCH ENABLE is LOW.
Digital ground return.
Most Significant Bit (MSB) of digital input word.
PIN CONFIGURATIONS
DIP
D
2
D
3
PLCC/LCC
D
1
(MSB)
1
2
3
4
5
6
7
8
9
10
28
27
26
25
24
D
1
(MSB0)
D
5
D
4
DIGITAL GROUND
LATCH ENABLE
ANALOG –V
S
R
SET
DIGITAL +V
S
REFERENCE GROUND
DIGITAL –V
S
REFERENCE OUT
CONTROL AMP IN
CONTROL AMP OUT
REFERENCE IN
I OUT
ANALOG –V
S
D
6
D
7
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
4
3
2
1
28 27
5
6
7
8
9
DIGITAL
GROUND
LATCH
ENABLE
D
3
D
2
26
25
ANALOG –V
S
24
R
SET
AD9712B
AD9713B
TOP VIEW
(Not to Scale)
23
22
21
20
19
18
17
16
15
D
8
D
9
D
10
AD9712B
AD9713B
TOP VIEW
(Not to Scale)
23
DIGITAL +V
S
22
GROUND
REFERENCE
21
DIGITAL –V
S
20
OUT
REFERENCE
D
11
10
D
12
(LSB)
11
19
CONTROL
AMP IN
D
12
(LSB) 11
DIGITAL –V
S
12
ANALOG RETURN 13
I
OUT
14
12
DIGITAL –V
S
13
ANALOG
RETURN
14 15 16
ANALOG –V
S
I
OUT
I
OUT
17 18
REFERENCE IN
CONTROL
AMP OUT
–4–
REV. B
AD [ ANALOG DEVICES ]
