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AD9713BAP 参数 Datasheet PDF下载

AD9713BAP图片预览
型号: AD9713BAP
PDF下载: 下载PDF文件 查看货源
内容描述: 12位, 100 MSPS D / A转换器 [12-Bit, 100 MSPS D/A Converters]
分类和应用: 转换器
文件页数/大小: 12 页 / 333 K
品牌: AD [ ANALOG DEVICES ]
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AD9712B/AD9713B
Parameter (Conditions)
POWER SUPPLY
13
Positive Supply Current (+5.0 V)
Negative Supply Current (–5.2 V)
14
Nominal Power Dissipation
Power Supply Rejection Radio (PSRR)
15
Temp
+25°C
Full
+25°C
Full
+25°C
+25°C
Test
Level
I
VI
I
VI
V
I
Min
AD9712B
All Grades
Typ
Max
AD9713B
All Grades
Min
Typ
6
140
728
30
178
183
100
145
784
30
Max
12
14
184
188
100
Units
mA
mA
mA
mA
mW
µA/V
NOTES
1
Measured as error in ratio of full-scale current to current through R
SET
(160
µA
nominal); ratio is nominally 128.
2
Full-scale variations among devices are higher when driving REFERENCE INPUT directly.
3
Frequency at which the gain is flat
±
0.5 dB; R
L
= 50
Ω;
50% modulation at midscale.
4
Based on I
FS
= 128 (V
REF
/R
SET
) when using internal amplifier.
5
Data registered into DAC accurately at this rate; does not imply settling to 12-bit accuracy.
6
Measured as voltage settling at midscale transition to
±
0.024%, R
L
= 50
Ω.
7
Measured as the time between the 50% point of the falling edge of LATCH ENABLE and the point where the output signal has left a 1 LSB error band
around its previous value.
8
Peak glitch impulse is measured as the largest area under a single positive or negative transient.
9
Measured with R
L
= 50
and DAC operating in latched mode.
10
Data must remain stable for specified time prior to falling edge of LATCH ENABLE signal.
11
Data must remain stable for specified time after rising edge of LATCH ENABLE signal.
12
SFDR is defined as the difference in signal energy between the fundamental and worst case spurious frequencies in the output spectrum window, which is
centered at the fundamental frequency and covers the indicated span.
13
Supply voltages should remain stable within
±
5% for normal operation.
14
108 mA typ on Digital –V
S
, 37 mA typ on Analog –V
S
.
15
Measured at
±
5% of +V
S
(AD9713B only) and –V
S
(AD9712B or AD9713B) using external reference.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1
ORDERING GUIDE
Model
AD9712BAN
AD9712BBN
AD9712BAP
AD9712BBP
AD9712BSQ/883B
AD9712BSE/883B
AD9712BTQ/883B
AD9712BTE/883B
AD9713BAN
AD9713BBN
AD9713BAP
AD9713BBP
AD9713BSQ/883B
AD9713BSE/883B
AD9713BTQ/883B
AD9713BTE/883B
Temperature
Range
–25°C to +85°C
–25°C to +85°C
–25°C to +85°C
–25°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–25°C to +85°C
–25°C to +85°C
–25°C to +85°C
–25°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Package
Description
28-Pin PDIP
28-Pin PDIP
28-Pin PLCC
28-Pin PLCC
28-Pin Cerdip
28-Pin LCC
28-Pin Cerdip
28-Pin LCC
28-Pin PDIP
28-Pin PDIP
28-Pin PLCC
28-Pin PLCC
28-Pin Cerdip
28-Pin LCC
28-Pin Cerdip
28-Pin LCC
Package
Option
N-28
N-28
P-28A
P-28A
Q-28
E-28A
Q-28
E-28A
N-28
N-28
P-28A
P-28A
Q-28
E-28A
Q-28
E-28A
Positive Supply Voltage (+V
S
) (AD9713B Only) . . . . . . . +6 V
Negative Supply Voltage (–V
S
) . . . . . . . . . . . . . . . . . . . . . –7 V
Analog-to-Digital Ground Voltage Differential . . . . . . . . 0.5 V
Digital Input Voltages (D
1
–D
12
, LATCH ENABLE)
AD9712B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to –V
S
AD9713B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +V
S
Internal Reference Output Current . . . . . . . . . . . . . . . . 500
µA
Control Amplifier Input Voltage Range . . . . . . . . . 0 V to –4 V
Control Amplifier Output Current . . . . . . . . . . . . . . .
±
2.5 mA
Reference Input Voltage Range (V
REF
) . . . . . . . . . . . 0 V to –V
S
Analog Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
AD9712B/AD9713BAN/AP/BN/BP . . . . . . . –25°C to +85°C
AD9712B/AD9713BSE/SQ/TE/TQ . . . . . . –55°C to +125°C
Maximum Junction Temperature
2
AD9712B/AD9713BAN/AP/BN/BP . . . . . . . . . . . . . +150°C
AD9712B/AD9713BSE/SQ/TE/TQ . . . . . . . . . . . . . +175°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
NOTES
1
Absolute maximum ratings are limiting values to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability is not necessarily implied. Exposure to absolute maximum rating
conditions for an extended period of time may affect device reliability.
2
Typical thermal impedances with parts soldered in place: 28-pin plastic DIP:
θ
JA
= 37°C/W,
θ
JC
= 10°C/W; 28-pin PLCC:
θ
JA
= 44°C/W,
θ
JC
= 14°C/W;
Cerdip:
θ
JA
= 32°C/W,
θ
JC
= 10°C/W; LCC:
θ
JA
= 41°C/W,
θ
JC
= 13°C/W. No air
flow.
EXPLANATION OF TEST LEVELS
Test Level
I –
II –
III –
IV –
V –
VI –
100% production tested.
100% production tested at +25°C, and sample tested at
specified temperatures.
Sample tested only.
Parameter is guaranteed by design and characterization
testing.
Parameter is a typical value only.
All devices are 100% tested at +25°C. 100% production
tested at temperature extremes for extended tempera-
ture devices; sample tested at temperature extremes for
commercial/industrial devices.
REV. B
–3–