AD9201
Parameter
DYNAMIC PERFORMANCE (SE)
3
Signal-to-Noise and Distortion
f = 3.58 MHz
Signal-to-Noise
f = 3.58 MHz
Total Harmonic Distortion
f = 3.58 MHz
Spurious Free Dynamic Range
f = 3.58 MHz
DIGITAL INPUTS
High Input Voltage
Low Input Voltage
DC Leakage Current
Input Capacitance
LOGIC OUTPUT (with DVDD = 3 V)
High Level Output Voltage
(I
OH
= 50
µA)
Low Level Output Voltage
(I
OL
= 1.5 mA)
LOGIC OUTPUT (with DVDD = 5 V)
High Level Output Voltage
(I
OH
= 50
µA)
Low Level Output Voltage
(I
OL
= 1.5 mA)
Data Valid Delay
MUX Select Delay
Data Enable Delay
Data High-Z Delay
CLOCKING
Clock Pulsewidth High
Clock Pulsewidth Low
Pipeline Latency
NOTES
1
AIN differential 2 V p-p, REFT = 1.5 V, REFB = –0.5 V.
2
IMD referred to larger of two input signals.
3
SE is single ended input, REFT = 1.5 V, REFB = –0.5 V.
Specifications subject to change without notice.
t
OD
Symbol
SINAD
Min
Typ
Max
Units
Condition
52.3
SNR
55.5
THD
–55
SFDR
–58
V
IH
V
IL
I
IN
C
IN
2.4
±
6
2
0.3
dB
dB
dB
dB
V
V
µA
pF
V
OH
V
OL
2.88
0.095
V
V
V
OH
V
OL
t
OD
t
MD
t
ED
t
DHZ
t
CH
t
CL
22.5
22.5
4.5
0.4
11
7
13
13
V
V
ns
ns
ns
ns
ns
ns
Cycles
C
L
= 20 pF. Output Level to
90% of Final Value
3.0
CLOCK
INPUT
ADC SAMPLE
#1
ADC SAMPLE
#2
ADC SAMPLE
#3
ADC SAMPLE
#4
ADC SAMPLE
#5
SELECT
INPUT
Q CHANNEL
OUTPUT ENABLED
t
MD
I CHANNEL
OUTPUT ENABLED
SAMPLE #1
Q CHANNEL
OUTPUT
SAMPLE #2
Q CHANNEL
OUTPUT
SAMPLE #1-1
Q CHANNEL
OUTPUT
DATA
OUTPUT
SAMPLE #1-3
Q CHANNEL
OUTPUT
SAMPLE #1-2
Q CHANNEL
OUTPUT
SAMPLE #1-1
I CHANNEL
OUTPUT
SAMPLE #1
I CHANNEL
OUTPUT
Figure 1. ADC Timing
REV. D
–3–
AD [ ANALOG DEVICES ]
