AD9201
VREF
ADC
CORE
0.1 F
10 F
0.1 F
IREFT
0.1 F
IREFB
VREF
10 F
0.1 F
REFSENSE
10k
1V
QREFT
0.1 F
QREFB
0.1 F
10 F
50
0.1 F
3
6
2
1k
0.01 F
1k
10pF
24
22
1k
0.33 F
22
10pF
17
ADC
16
AD8051
Figure 27.
10k
AVSS
INTERNAL
CONTROL
LOGIC
10
0
FUND
AD9201
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0.0E+0
4TH
6TH
8TH
7TH
5TH
2ND
3RD
Figure 26. Reference Buffer Equivalent Circuit and Exter-
nal Decoupling Recommendation
For best results in both noise suppression and robustness
against crosstalk, the 4 capacitor buffer decoupling arrangement
shown in Figure 26 is recommended. This decoupling should
feature chip capacitors located close to the converter IC. The
capacitors are connected to either IREFT/IREFB or QREFT/
QREFB. A connection to both sides is not required.
DRIVING THE AD9201
Figure 27 illustrates the use of an AD8051 to drive the AD9201.
Even though the AD8051 is specified with 3 V and 5 V power,
the best results are obtained at
±
5 V power. The ADC input
span is 2 V.
2.0E+6
4.0E+6
6.0E+6
8.0E+6
10.0E+6
1.0E+6
3.0E+6
5.0E+6
7.0E+6
9.0E+6
Figure 28. AD8051/AD9201 Performance
REV. D
–11–
AD [ ANALOG DEVICES ]
