AD9066
5.8
ENCODE = 60MSPS
5.7
Gain Variation
5.6
ENOB – Bits
The full-scale input range is established by the current through
the two matched resistor ladders (620 ohms each nominal). There-
fore the gain of the ADC may be modified by forcing different
voltages across the top and bottom voltage taps (VT and VB).
The easiest way to increase the input range will be to force VB
to a lower voltage. Using an external amplifier, the voltage at VB
may be forced as low as 3.0 V (3.58 nominal). Using the pre-
viously described relationship for full scale and the internal
resistor ladder values, 3.0 V at VB will result in a nominal full-
scale input range of 705 mV.
A larger input range can be established by taking the VT voltage
all the way to the supply voltage level while pulling VB to 3.0 V.
This would force a 2 V potential across the ladder and create a
full-scale input range of 1.6 V.
Greater flexibility and improved power supply rejection can be
achieved by forcing external voltage references at both the top
and bottom of the resistor ladder.
111111
5.5
5.4
5.3
5.2
1
10
MHz
100
Figure 1. ENOB vs. Analog Input Frequency
5.8
ANALOG INPUT = 10.1MHz
5.7
5.6
ENOB – Bits
2
n
–2 = 62
100000
5.5
011111
5.4
5.3
000001
000000
5.2
10
MHz
100
–FULL-SCALE
MIDSCALE
+FULL-SCALE
Figure 2. ENOB vs. Encode Rate
USING THE AD9066
Analog Input and Voltage References
+V
S
= 5V
400
VT
40k
REF B
310
VB
2mA
310
310
310
Figure 3.
The AD9066 is optimized to allow ac coupled inputs with a full-
scale input range of 500 mV
±
5%. An LSB weight is approxi-
mately 8 mV. The full-scale input range is defined as the voltage
range that accommodates 2
n
– 2 codes of equally weighted LSBs
(between the first and last code transitions). For the AD9066
there are 32 codes above and below the midscale voltage of the
A see Figure 3).
The full-scale input range of the AD9066 is equal to 500/620
×
(VT – VB), or nominally 500 mV. For dc coupled applications,
the REF A and REF B voltages can be used to feed back offset
compensation signals. This will allow the midscale transition
voltage of the ADCs to track supply and temperature variations.
In the event that offset correction signals are generated digitally,
the REF pins would not be required. Figure 4a shows the
equivalent circuit for the internal references. All component
tolerances are
±
25%.
V
S
40k
REF A
INPUT
1.4V THRESHOLD
a. Reference Circuit
V
S
b. Encode Input
V
S
OUTPUTS
40k
REF
c. Output Bits
d. Analog Input
Figure 4. Equivalent Circuits
–4–
REV. A
AD [ ANALOG DEVICES ]
