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AD9042AST 参数 Datasheet PDF下载

AD9042AST图片预览
型号: AD9042AST
PDF下载: 下载PDF文件 查看货源
内容描述: 12位, 41 MSPS单芯片A / D转换器 [12-Bit, 41 MSPS Monolithic A/D Converter]
分类和应用: 转换器
文件页数/大小: 24 页 / 489 K
品牌: ADI [ ADI ]
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AD9042  
D IGITAL WID EBAND RECEIVERS  
Intr oduction  
is used for demodulation, different routines may be used to  
demodulate different standards such as AM, FM, GMSK or any  
other desired standard. In addition, as new standards arise or  
new software revisions are generated, they may be field installed  
with standard software update channels. A radio that performs  
demodulation in software as opposed to hardware is often  
referred to as a soft radio because it may be changed or modified  
simply through code revision.  
Several key technologies are now being introduced that may  
forever alter the vision of radio. Figure 49 shows the typical  
dual conversion superheterodyne receiver. T he signal picked up  
by the antenna is mixed down to an intermediate frequency (IF)  
using a mixer with a variable local oscillator (LO); the variable  
LO is used to “tune-in” the desired signal. T his first IF is  
mixed down to a second IF using another mixer stage and a  
fixed LO. Demodulation takes place at the second or third IF  
using either analog or digital techniques.  
System D escr iption  
In the wideband digital radio (Figure 50), the first down  
conversion functions in much the same way as a block converter  
does. An entire band is shifted in frequency to the desired  
intermediate frequency. In the case of cellular base station  
receivers, 5 MHz to 20 MHz of bandwidth are down-converted  
simultaneously to an IF frequency suitable for digitizing with a  
wideband analog-to-digital converter. Once digitized the  
broadband digital data stream contains all of the in-band  
signals. T he remainder of the radio is constructed digitally using  
special purpose and general purpose programmable DSP to  
perform filtering, demodulation and signal conditioning not  
unlike the analog counter parts.  
ADCs  
NARROWBAND  
FILTER  
NARROWBAND  
FILTER  
LNA  
I
Q
IF  
IF  
2
RF  
1
e.g.  
900MHz  
FIXED  
VARIABLE  
ONE RECEIVER PER CHANNEL  
SHARED  
Figure 49. Narrowband Digital Receiver Architecture  
In the narrowband receiver (Figure 49), the signal to be received  
must be tuned. T his is accomplished by using a variable local  
oscillator at the first mix down stage. T he first IF then uses a  
narrow band filter to reject out of band signals and condition  
the selected carrier for signal demodulation.  
If demodulation takes place in the analog domain then  
traditional discriminators, envelop detectors, phase locked loops  
or other synchronous detectors are generally employed to strip  
the modulation from the selected carrier.  
In the digital wideband receiver (Figure 50), the variable local  
oscillator has been replaced with a fixed oscillator, so tuning  
must be accomplished in another manner. T uning is performed  
digitally using a digital down conversion and filter chip fre-  
quently called a channelizer. T he term channelizer is used  
because the purpose of these chips is to select one channel out  
of the many within the broadband of spectrum actually present  
in the digital data stream of the ADC.  
However, as general purpose DSP chips such as the ADSP-2181  
become more popular, they will be used in many baseband-  
sampled applications like the one shown in Figure 49. As  
shown in the figure, prior to ADC conversion, the signal must  
be mixed down, filtered, and the I and Q components separated.  
T hese functions are realizable through DSP techniques,  
however several key technology breakthroughs are required:  
high dynamic range ADCs such as the AD9042, new DSPs  
(highly programmable with onboard memory, fast), digital tuner  
& filter (with programmable frequency and BW) and wide band  
mixers (high dynamic range with >12.5 MHz BW).  
DECIMATION  
FILTER  
LOW-PASS  
FILTER  
I
COS  
DIGITAL  
TUNER  
DATA  
WIDEBAND  
ADC  
WIDEBAND  
SIN  
WIDEBAND  
MIXER  
FILTER  
DECIMATION  
FILTER  
LOW-PASS  
FILTER  
LNA  
Q
"n" CHANNELS  
TO DSP  
RF  
e.g.  
900MHz  
12.5MHz  
(416 CHANNELS)  
Figure 51. Digital Channelizer  
Figure 51 shows the block diagram of a typical channelizer.  
Channelizers consist of a complex NCO (Numerically  
Controlled Oscillator), dual multiplier (mixer), and matched  
digital filters. T hese are the same functions that would be  
required in an analog receiver, however implemented in digital  
form. T he digital output from the channelizer is the desired  
carrier, frequently in I & Q format; all other signals have been  
filtered and removed based on the filtering characteristics  
desired. Since the channelizer output consists of one selected  
RF channel, one tuner chip is required for each frequency  
received, although only one wideband RF receiver is needed for  
the entire band. Data from the channelizer may then be  
processed using a digital signal processor such as the ADSP-  
2181 or the SHARC processor, the ADSP-21062. T his data  
may then be processed through software to demodulate the  
information from the carrier.  
FIXED  
CHANNEL SELECTION  
SHARED  
Figure 50. Wideband Digital Receiver Architecture  
Figure 50 shows such a wideband system. T his design shows  
that the front end variable local oscillator has been replaced with  
a fixed oscillator (for single band radios) and the back end has  
been replaced with a wide dynamic range ADC, digital tuner  
and DSP. T his technique offers many benefits.  
First, many passive discrete components have been eliminated  
that formed the tuning and filtering functions. T hese passive  
components often require “tweaking” and special handling  
during assembly and final system alignment. Digital compo-  
nents require no such adjustments; tuner and filter characteristics  
are always exactly the same. Moreover, the tuning and filtering  
characteristics can be changed through software. Since software  
REV. A  
–19–