AD8307
7
5
VPS
INT
It can be desirable to increase the speed of the output response,
with the penalty of increased ripple. One way to do this is
simply by connecting a shunt load resistor from Pin OUT to
ground, which raises the low-pass corner frequency. This also
alters the logarithmic slope, for example to 7.5 mV/dB using a
5.3ꢀ kΩ resistor, while reducing the 10% to 90% rise time to
25 ns. The ripple amplitude for 50 MHz input remains 0.5 mV,
but this is now equivalent to 0.07 dB. If a negative supply is
available, the output pin can be connected directly to the
summing node of an external op amp connected as an inverting
mode transresistance stage.
3pF
1.25kΩ
1.25kΩ
1.25kΩ
1.25kΩ
8.25kΩ
60kΩ
LGP
LGM
~400mV
FROM ALL
DETECTORS
2µA/dB
0–220µA
25mV/dB
C2
1pF
BIAS
60µA
4
OUT
C1
2.5pF
R1
12.5kΩ
C
FLT
2
COM
Figure 31. Simplified Output Interface
Note that while the AD8307 can operate down to supply
voltages of 2.7 V, the output voltage limit is reduced when the
supply drops below 4 V. This characteristic is the result of
necessary headroom requirements, approximately two VBE
drops, in the design of the output stage.
Rev. C | Page ±6 of 24
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