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AD7811YRU 参数 Datasheet PDF下载

AD7811YRU图片预览
型号: AD7811YRU
PDF下载: 下载PDF文件 查看货源
内容描述: +2.7 V至+5.5 V , 350 kSPS时, 10位4- / 8通道采样ADC [+2.7 V to +5.5 V, 350 kSPS, 10-Bit 4-/8-Channel Sampling ADCs]
分类和应用:
文件页数/大小: 19 页 / 211 K
品牌: ADI [ ADI ]
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AD7811/AD7812  
RFS. The first rising SCLK edge after the rising edge of the  
RFS signal causes DOUT to leave its high impedance state and  
data is clocked out onto the DOUT line and also on subsequent  
SCLK rising edges. The DOUT pin goes back into a high  
impedance state on the 11th SCLK rising edge—Point “A” on  
Figure 18. A minimum of 11 SCLKs are therefore needed to  
carry out a serial read. Data on the DIN line is latched in on  
the first SCLK falling edge after the falling edge of the TFS  
signal and on subsequent SCLK falling edges. The control  
register is updated on the 13th SCLK rising edge—point “B” on  
Figure 18. A minimum of 13 SCLK pulses are therefore needed  
to complete a serial write operation. In multipackage applications  
the RFS and TFS signals can be used as chip select signals. The  
serial interface will not shift data in or out until it receives the  
active edge of the RFS or TFS signal.  
AD7811/AD7812 to MC68HC11  
The Serial Peripheral Interface (SPI) on the MC68HC11 is  
configured for Master Mode (MSTR = 0), Clock Polarity Bit  
(CPOL) = 0 and the Clock Phase Bit (CPHA) = 1. The SPI is  
configured by writing to the SPI Control Register (SPCR)—see  
68HC11 user manual. A connection diagram is shown in  
Figure 20.  
AD7811/AD7812*  
MC68HC11*  
SCLK/PD4  
SCLK  
DOUT  
DIN  
MISO/PD2  
MOSI/PD3  
Simplifying the Serial Interface  
CONVST  
PA0  
The five-wire interface is designed to support many different  
serial interface standards. However, it is possible to reduce the  
number of lines required to just three. By simply connecting the  
TFS and RFS pins to the CONVST signal (see Figure 4), the  
CONVST signal can be used to enable the serial port for read-  
ing and writing. This is only possible where a noncontinuous  
serial clock is being used.  
RFS  
TFS  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 20. Interfacing to the MC68HC11  
AD7811/AD7812 to 8051  
MICROPROCESSOR INTERFACING  
The AD7811/AD7812 requires a clock synchronized to the  
serial data. The 8051 serial interface must therefore be operated  
in Mode 0. In this mode serial data enters and exits through  
RxD and a shift clock is output on TxD (half duplex). Figure 21  
shows how the 8051 is connected to the AD7811/AD7812.  
However, because the AD7811/AD7812 shifts data out on the  
rising edge of the shift clock and latches data in on the falling  
edge, the shift clock must be inverted.  
The serial interface on the AD7811 and AD7812 allows the  
parts to be directly connected to a range of many different  
microprocessors. This section explains how to interface the  
AD7811 and AD7812 with some of the more common micro-  
controller and DSP serial interface protocols.  
AD7811/AD7812 to PIC16C6x/7x  
The PIC16C6x Synchronous Serial Port (SSP) is configured as  
an SPI Master with the Clock Polarity bit = 0. This is done  
by writing to the Synchronous Serial Port Control Register  
(SSPCON). See user PIC16/17 Microcontroller User Manual.  
Figure 19 shows the hardware connections needed to interface  
to the PIC16/17. In this example I/O port RA1 is being used to  
pulse CONVST and enable the serial port of the AD7811/  
AD7812. This microcontroller transfers only eight bits of data  
during each serial transfer operation; therefore, two consecutive  
read/write operations are needed.  
8051*  
AD7811/AD7812*  
SCLK  
DOUT  
DIN  
TxD  
RxD  
RFS  
TFS  
P1.1  
PIC16C6x/7x*  
SCK/RC3  
AD7811/AD7812*  
SCLK  
*ADDITIONAL PINS OMITTED FOR CLARITY  
DOUT  
DIN  
SDO/RC5  
Figure 21. Interfacing to the 8051 Serial Port  
SDI/ RC4  
RA1  
CONVST  
RFS  
TFS  
*ADDITIONAL PINS OMITTED FOR CLARITY  
Figure 19. Interfacing to the PIC16/17  
–16–  
REV. B