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AD7811YRU 参数 Datasheet PDF下载

AD7811YRU图片预览
型号: AD7811YRU
PDF下载: 下载PDF文件 查看货源
内容描述: +2.7 V至+5.5 V , 350 kSPS时, 10位4- / 8通道采样ADC [+2.7 V to +5.5 V, 350 kSPS, 10-Bit 4-/8-Channel Sampling ADCs]
分类和应用:
文件页数/大小: 19 页 / 211 K
品牌: AD [ ANALOG DEVICES ]
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AD7811/AD7812
t
t
POWER-UP CONVERT
2.3 s
1.5 s
POWER-DOWN
CONVST
QUICK EVALUATION SETUP
t
CYCLE
100 s @ 10kSPS
Figure 11. Automatic Power-Down
For example, if the AD7811 is operated in a continuous sam-
pling mode with a throughput rate of 10 kSPS, PD1 = 1,
PD0 = 0 and using the on chip reference the power consump-
tion is calculated as follows. The power dissipation during nor-
mal operation is 10.5 mW, V
DD
= 3 V. If the power-up time is
1.5
µs
and the conversion time is 2.3
µs,
the AD7811 can be
said to dissipate 10.5 mW for 3.8
µs
(worst-case) during each
conversion cycle. If the throughput rate is 10 kSPS, the cycle
time is 100
µs
and the average power dissipated during each
cycle is (3.8/100)
×
(10.5 mW) = 400
µW.
Figure 12 shows the Power vs. Throughput Rate for automatic
full power-down.
The schematic shown in Figure 14 shows a suggested configura-
tion of the AD7812 for a first look evaluation of the part. No
external reference circuit is needed as the V
REF
pin can be
connected to V
DD
. The
CONVST
signal is connected to TFS
and RFS to enable the serial port. Also by selecting Mode 2
operation (see Operating Modes section) the power performance
of the AD7812 can be evaluated.
SUPPLY
V
DD
10 F
0.1 F
10nF
V
DD
0V TO V
DD
INPUT
V
IN1
V
IN2
V
REF
C
REF
SCLK
DOUT
AD7812
V
IN7
DIN
CONVST
RFS
TFS
A0
10
V
IN8
AGND
DGND
1
POWER – mV
Figure 14. Evaluation Quick Setup
0.1
The setup uses a full duplex, 16-bit, serial interface protocol,
e.g., SPI. It is possible to use 8-bit transfers by carrying out two
consecutive read/write operations. The MSB of data is trans-
ferred first.
1. When power is first connected to the device it is in a powered
down mode of operation and is consuming only 1
µA.
The
AD7812 must first be configured by carrying out a serial
write operation.
2. The
CONVST
signal is first pulsed to enable the serial port
(rising and falling edge on RFS and TFS respectively—see
Serial Interface section).
3. Next, a 16-bit serial read/write operation is carried out. By
writing 6040 Hex to the AD7812 the part is powered up, set
up to use external reference (i.e., V
DD
) and the analog input
V
IN1
is selected. The data read from the part during this read/
write operation is invalid.
4. It is necessary to wait approximately 1.5
µs
before pulsing
CONVST
again and initiating a conversion. The 1.5
µs
is to
allow the AD7812 to power up correctly—see Power-Up
Times section.
5. Approximately 2.3
µs
after the falling edge of
CONVST,
i.e.,
after the end of the conversion, a serial read/write can take
place. This time 4040 Hex is written to the AD7812 and the
data read from the part is the result of the conversion. The
output code is in a straight binary format and will be left
justified in the 16-bit serial register (MSB clocked out first).
6. By idling the
CONVST
signal high or low it is possible to
operate the AD7812 in Mode 1 and Mode 2 respectively.
0.01
0
5
10
15
20
25
30
35
THROUGHPUT – kSPS
40
45
50
Figure 12. AD7811/AD7812 Power vs. Throughput
0
–10
–20
–30
dBs
–40
–50
–60
–70
–80
–90
–100
0
17
35
52
70
87
105 122
FREQUENCY – kHz
140
157 174
AD7811/12
2048 POINT FFT
SAMPLING 357.142kHz
f
IN
= 30.168kHz
Figure 13. AD7811/AD7812 SNR
REV. B
–13–