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AD7804BR 参数 Datasheet PDF下载

AD7804BR图片预览
型号: AD7804BR
PDF下载: 下载PDF文件 查看货源
内容描述: +3.3 V至+5 V四/八通道10位DAC [+3.3 V to +5 V Quad/Octal 10-Bit DACs]
分类和应用:
文件页数/大小: 28 页 / 302 K
品牌: AD [ ANALOG DEVICES ]
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AD7804/AD7805/AD7808/AD7809
AD7808/AD7809–SPECIFICATIONS
(AV
Reference = Internal Reference; C
L
= 100 pF; R
L
= 2 k
Parameter
STATIC PERFORMANCE
MAIN DAC
Resolution
Relative Accuracy
Gain Error
Bias Offset Error
2
Zero-Scale Error
Monotonicity
Minimum Load Resistance
SUB DAC
Resolution
Differential Nonlinearity
OUTPUT CHARACTERISTICS
Output Voltage Range
3
Voltage Output Settling Time to 10 Bits
Slew Rate
Digital-to-Analog Glitch Impulse
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DC Output Impedance
Power Supply Rejection Ratio
DAC REFERENCE INPUTS
REF IN Range
REF IN Input Leakage
DIGITAL INPUTS
Input High Voltage, V
IH
@ V
DD
= 5 V
Input High Voltage, V
IH
@ V
DD
= 3.3 V
Input Low Voltage, V
IL
@ V
DD
= 5 V
Input Low Voltage, V
IL
@ V
DD
= 3.3 V
Input Leakage Current
Input Capacitance
Input Coding
REFERENCE OUTPUT
REF OUT Output Voltage
REF OUT Error
REF OUT Temperature Coefficient
REF OUT Output Impedance
POWER REQUIREMENTS
V
DD
(AV
DD
and DV
DD
)
I
DD
(AI
DD
Plus DI
DD
)
Normal Mode
System Standby (SSTBY) Mode
Power-Down (PD) Mode
@ +25°C
T
MIN
–T
MAX
Power Dissipation
Normal Mode
System Standby (SSTBY) Mode
Power-Down (PD) Mode
@ +25°C
T
MIN
–T
MAX
B Grade
1
10
±
4
±
3
±
60
±
35
9
2
8
±
0.125
±
0.5
V
BIAS
±
15/16
×
V
BIAS
V
BIAS
/16 to 31/16
×
V
BIAS
4
2.5
1
0.5
0.5
±
0.2
2
0.002
1.0 to V
DD
/2
±
1
2.4
2.1
0.8
0.6
±
10
8
Twos Comp/Binary
1.23
±
8
–100
5
3/5.5
18
250
1
3
99
1.38
5.5
16.5
and DV
DD
= 3.3 V 10% to 5 V 10%; AGND = DGND = 0 V;
to GND. Sub DAC at Midscale. All specifications T
MIN
to T
MAX
unless otherwise noted.)
DD
Units
Comments
Bits
LSB max
% FSR max
mV max
mV max
Bits
kΩ min
Bits
LSB typ
LSB max
V
V
µs
max
V/µs typ
nV-s typ
nV-s typ
nV-s typ
LSB typ
typ
%/% typ
V min to V max
µA
max
V min
V min
V max
V max
µA
max
pF max
DAC Code = 0.5 Full Scale
DAC Code = 000H for Offset Binary
and 200H for Twos Complement
Coding
Refers to an LSB of the Main DAC
Twos Complement Coding
Offset Binary Coding
Typically 1.5
µs
1 LSB Change Around the Major Carry
∆V
DD
±
10%
Typically
±
1 nA
V nom
% max
ppm/°C typ
kΩ nom
V min to V max
mA max
µA
max
µA
max
µA
max
mW max
mW max
µW
max
µW
max
Excluding Load Currents
V
IH
= V
DD
, V
IL
= DGND
V
IH
= V
DD
, V
IL
= DGND
V
IH
= V
DD
, V
IL
= DGND
Excluding Power Dissipated in Load
NOTES
1
Temperature range is – 40°C to +85°C.
2
Can be minimized using the Sub DAC.
3
V
BIAS
is the center of the output voltage swing and can be V
DD
/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
Specifications subject to change without notice.
REV. A
–3–