AD7606/AD7606-6/AD7606-4
Parameter
t
13
Limit at T
MIN
, T
MAX
Min
Typ
Max
16
20
25
30
t
16
21
25
32
t
15
t
16
t
17
SERIAL READ OPERATION
f
SCLK
23.5
17
14.5
11.5
t
18
15
20
30
t
19 4
17
23
27
34
t
20
t
21
t
22
t
23
FRSTDATA OPERATION
t
24
15
20
25
30
t
25
15
20
25
30
t
26
16
20
25
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.4 t
SCLK
0.4 t
SCLK
7
22
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
6
6
22
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
Description
Delay from CS until DB[15:0] three-state disabled
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
Data access time after RD falling edge
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
Data hold time after RD falling edge
CS to DB[15:0] hold time
Delay from CS rising edge to DB[15:0] three-state enabled
Frequency of serial read clock
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
Delay from CS until D
OUT
A/D
OUT
B three-state disabled/delay from CS
until MSB valid
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
= 2.3 V to 2.7 V
Data access time after SCLK rising edge
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
SCLK low pulse width
SCLK high pulse width
SCLK rising edge to D
OUT
A/D
OUT
B valid hold time
CS rising edge to D
OUT
A/D
OUT
B three-state enabled
Delay from CS falling edge until FRSTDATA three-state disabled
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
Delay from CS falling edge until FRSTDATA high, serial mode
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
Delay from RD falling edge to FRSTDATA high
V
DRIVE
above 4.75 V
V
DRIVE
above 3.3 V
V
DRIVE
above 2.7 V
V
DRIVE
above 2.3 V
Rev. 0 | Page 8 of 36
AD [ ANALOG DEVICES ]
