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AD7528LR 参数 Datasheet PDF下载

AD7528LR图片预览
型号: AD7528LR
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS双8位缓冲乘法DAC [CMOS Dual 8-Bit Buffered Multiplying DAC]
分类和应用:
文件页数/大小: 8 页 / 191 K
品牌: AD [ ANALOG DEVICES ]
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AD7528
APPLICATIONS INFORMATION
Application Hints
To ensure system performance consistent with AD7528 specifi-
cations, careful attention must be given to the following points:
1. GENERAL GROUND MANAGEMENT: AC or transient
voltages between the AD7528 AGND and DGND can cause
noise injection into the analog output. The simplest method
of ensuring that voltages at AGND and DGND are equal is
to tie AGND and DGND together at the AD7528. In more
complex systems where the AGND–DGND intertie is on the
backplane, it is recommended that diodes be connected in
inverse parallel between the AD7528 AGND and DGND
pins (1N914 or equivalent).
2. OUTPUT AMPLIFIER OFFSET: CMOS DACs exhibit a
code-dependent output resistance which in turn causes a
code-dependent amplifier noise gain. The effect is a code-
dependent differential nonlinearity term at the amplifier
output which depends on V
OS
(V
OS
is amplifier input offset
voltage). This differential nonlinearity term adds to the R/2R
differential nonlinearity. To maintain monotonic operation, it
is recommended that amplifier V
OS
be no greater than 10% of
1 LSB over the temperature range of interest.
3. HIGH FREQUENCY CONSIDERATIONS: The output
capacitance of a CMOS DAC works in conjunction with the
amplifier feedback resistance to add a pole to the open loop
response. This can cause ringing or oscillation. Stability can
be restored by adding a phase compensation capacitor in
parallel with the feedback resistor.
DYNAMIC PERFORMANCE
ship between input frequency and channel to channel isolation.
Figure 7 shows a printed circuit layout for the AD7528 and the
AD644 dual op amp which minimizes feedthrough and crosstalk.
SINGLE SUPPLY APPLICATIONS
The AD7528 DAC R-2R ladder termination resistors are con-
nected to AGND within the device. This arrangement is par-
ticularly convenient for single supply operation because AGND
may be biased at any voltage between DGND and V
DD
. Figure
8 shows a circuit which provides two +5 V to +8 V analog out-
puts by biasing AGND +5 V up from DGND. The two DAC
reference inputs are tied together and a reference input voltage
is obtained without a buffer amplifier by making use of the
constant and matched impedances of the DAC A and DAC B
reference inputs. Current flows through the two DAC R-2R
ladders into R1 and R1 is adjusted until the V
REF
A and V
REF
B
inputs are at +2 V. The two analog output voltages range from
+5 V to +8 V for DAC codes 00000000 to 11111111.
V
DD
= +15V
DAC A
DATA
INPUTS
CS
WR
DAC A/DAC
B
2 VOLTS
R1
10k
R2
1k
AD584J
GND
DB0
DB7
V
OUT
A = +5V TO +8V
SUGGESTED
OP AMP:
AD644
V
OUT
B = +5V TO +8V
AD7528
DAC B
V
DD
The dynamic performance of the two DACs in the AD7528 will
depend upon the gain and phase characteristics of the output
amplifiers together with the optimum choice of the PC board
layout and decoupling components. Figure 6 shows the relation
–100
–90
ISOLATION – dB
–80
–70
T
A
= +25 C
V
DD
= +15V
V
IN
= 20V PEAK TO PEAK
Figure 8. AD7528 Single Supply Operation
Figure 9 shows DAC A of the AD7528 connected in a positive
reference, voltage switching mode. This configuration is useful
in that V
OUT
is the same polarity as V
IN
allowing single supply
operation. However, to retain specified linearity, V
IN
must be in
the range 0 V to +2.5 V and the output buffered or loaded with
a high impedance, see Figure 10. Note that the input voltage is
connected to the DAC OUT A and the output voltage is taken
from the DAC V
REF
A pin.
V
IN
(0V TO +2.5V)
V
OUT
V
REF
A
–60
–50
V
DD
+15V
20k
50k
100k
200k
INPUT FREQUENCY – Hz
500k
1M
DAC A
OUT A
AD7528
Figure 6. Channel-to-Channel Isolation
AD644
V+
PIN 8 OF TO-5 CAN (AD644)
Figure 9. AD7528 in Single Supply, Voltage Switching Mode
3
T
A
= +25 C
V
DD
= +15V
ERROR – LSB
2
NONLINEARITY
V–
AGND
AD7528 PIN 1
C2 LOCATION *NOTE
INPUT SCREENS
TO REDUCE
V
REF
A*
FEEDTHROUGH.
DGND
LAYOUT SHOWS
DAC A/DAC
B
COPPER SIDE
(i.e., BOTTOM VIEW).
MSB
C1 LOCATION
V
REF
B*
V
DD
WR
CS
LSB
1
DIFFERENTIAL
NONLINEARITY
2.5
3
3.5
4
5
4.5
5.5
V
IN
A – Volts
6
6.5
7
7.5
AD7528
Figure 7. Suggested PC Board Layout for AD7528 with
AD644 Dual Op Amp
Figure 10. Typical AD7528 Performance in Single Supply
Voltage Switching Mode (K/B/T, L/C/U Grades)
–6–
REV. B