AD627
ERRORS DUE TO AC CMRR
In Table 9, the error due to common-mode rejection results
from the common-mode voltage from the bridge 2.5 V. The
ac error due to less than ideal common-mode rejection cannot
be calculated without knowing the size of the ac common-mode
voltage (usually interference from 50 Hz/60 Hz mains frequencies).
A mismatch of 0.1% between the four gain setting resistors
determines the low frequency CMRR of a two-op-amp
instrumentation amplifier. The plot in Figure 43 shows the
practical results of resistor mismatch at ambient temperature.
The CMRR of the circuit in Figure 42 (Gain = +11) was
measured using four resistors with a mismatch of nearly 0.1%
(R1 = 9999.5 Ω, R2 = 999.76 Ω, R3 = 1000.2 Ω, R4 = 9997.7 Ω).
As expected, the CMRR at dc was measured at about 84 dB
(calculated value is 85 dB). However, as frequency increases,
CMRR quickly degrades. For example, a 200 mV p-p harmonic
of the mains frequency at 180 Hz would result in an output
voltage of about 800 μV. To put this in context, a 12-bit data
acquisition system, with an input range of 0 V to 2.5 V, has an
LSB weighting of 610 μV.
By contrast, the AD627 uses precision laser trimming of internal
resistors, along with patented CMR trimming, to yield a higher
dc CMRR and a wider bandwidth over which the CMRR is flat
(see Figure 23).
+5V
GROUND RETURNS FOR INPUT BIAS CURRENTS
Input bias currents are dc currents that must flow to bias the
input transistors of an amplifier. They are usually transistor base
currents. When amplifying floating input sources, such as
transformers or ac-coupled sources, there must be a direct dc
path into each input so that the bias current can flow. Figure 44,
path for the cases of, respectively, transformer coupling, a
thermocouple application, and capacitive ac-coupling.
In dc-coupled resistive bridge applications, providing this path
is generally not necessary because the bias current simply flows
from the bridge supply through the bridge and into the amplifier.
However, if the impedance that the two inputs see are large, and
differ by a large amount (>10 kΩ), the offset current of the input
stage causes dc errors compatible with the input offset voltage of
the amplifier.
–INPUT
+V
S
2
1
7
R
G
8
AD627
5
4
3
6
V
OUT
+INPUT
REFERENCE
LOAD
00782-042
–V
S
TO POWER
SUPPLY
GROUND
Figure 44. Ground Returns for Bias Currents with Transformer Coupled Inputs
–INPUT
+V
S
2
1
7
VIN–
VIN+
A1
1/2
OP296
A2
1/2
OP296
V
OUT
R
G
8
AD627
5
4
3
6
V
OUT
+INPUT
REFERENCE
LOAD
00782-043
00782-044
00782-040
R1
9999.5Ω
–5V
R2
999.76Ω
–V
S
R3
1000.2Ω
R4
9997.7Ω
TO POWER
SUPPLY
GROUND
Figure 45. Ground Returns for Bias Currents with Thermocouple Inputs
–INPUT
+V
S
2
1
7
Figure 42. 0.1% Resistor Mismatch Example
120
110
100
CMRR (dB)
R
G
+INPUT
100kΩ
8
3
AD627
5
4
6
V
OUT
REFERENCE
LOAD
90
80
70
60
50
40
30
1
10
100
1k
FREQUENCY (Hz)
10k
100k
00782-041
–V
S
TO POWER
SUPPLY
GROUND
Figure 46. Ground Returns for Bias Currents with AC-Coupled Inputs
20
Figure 43. CMRR over Frequency of Discrete In-Amp in Figure 42
Rev. D | Page 19 of 24
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