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AD565AJD 参数 Datasheet PDF下载

AD565AJD图片预览
型号: AD565AJD
PDF下载: 下载PDF文件 查看货源
内容描述: 高速12位单片D / A转换器 [High Speed 12-Bit Monolithic D/A Converters]
分类和应用: 转换器
文件页数/大小: 11 页 / 154 K
品牌: ADI [ ADI ]
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AD565A/AD566A  
GROUNDING RULES  
ABSOLUTE MAXIMUM RATINGS  
The AD565A and AD566A bring out separate reference and  
power grounds to allow optimum connections for low noise and  
high-speed performance. These grounds should be tied together  
at one point, usually the device power ground. The separate  
ground returns are provided to minimize current flow in  
low-level signal paths. In this way, logic return currents are not  
summed into the same return path with analog signals.  
VCC to Power Ground . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V  
VEE to Power Ground (AD565A) . . . . . . . . . . . . 0 V to –18 V  
Voltage on DAC Output (Pin 9) . . . . . . . . . . . . –3 V to +12 V  
Digital Inputs (Pins 13 to 24) to  
Power Ground . . . . . . . . . . . . . . . . . . . . . . –1.0 V to +7.0 V  
REF IN to Reference Ground . . . . . . . . . . . . . . . . . . . . 12 V  
Bipolar Offset to Reference Ground . . . . . . . . . . . . . . . 12 V  
10 V Span R to Reference Ground . . . . . . . . . . . . . . . . 12 V  
20 V Span R to Reference Ground . . . . . . . . . . . . . . . . 24 V  
REF OUT (AD565A) . . . . . Indefinite Short to Power Ground  
Momentary Short to VCC  
CONNECTING THE AD565A FOR BUFFERED VOLTAGE  
OUTPUT  
The standard current-to-voltage conversion connections using  
an operational amplifier are shown here with the preferred  
trimming techniques. If a low offset operational amplifier  
(AD510L, AD517L, AD741L, AD301AL, AD OP07) is used,  
excellent performance can be obtained in many situations with-  
out trimming (an op amp with less than 0.5 mV max offset  
voltage should be used to keep offset errors below 1/2 LSB). If  
a 50 fixed resistor is substituted for the 100 trimmer, uni-  
polar zero will typically be within 1/2 LSB (plus op amp off-  
set), and full-scale accuracy will be within 0.1% (0.25% max).  
Substituting a 50 resistor for the 100 bipolar offset trimmer  
will give a bipolar zero error typically within 2 LSB (0.05%).  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW  
AD565A ORDERING GUIDE  
Max Gain  
Linearity  
T.C. (ppm Temperature  
of F.S./؇C) Range  
Error Max Package  
@ +25؇C  
Model1  
Options2  
AD565AJD 50  
AD565AJR 50  
AD565AKD 20  
AD565ASD 30  
AD565ATD 15  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
–55°C to +125°C  
–55°C to +125°C  
1/2 LSB  
1/2 LSB  
1/4 LSB  
1/2 LSB  
1/4 LSB  
Ceramic (D-24)  
SOIC (R-28)  
Ceramic (D-24)  
Ceramic (D-24)  
Ceramic (D-24)  
NOTES  
1For details on grade and package offerings screened in accordance with MIL-  
STD-883, refer to the Analog Devices Military Products Databook or current/  
883B data sheet.  
The AD509 is recommended for buffered voltage-output appli-  
cations which require a settling time to 1/2 LSB of one micro-  
second. The feedback capacitor is shown with the optimum  
value for each application; this capacitor is required to compen-  
sate for the 25 picofarad DAC output capacitance.  
2D = Ceramic DIP, R = SOIC.  
AD566A ORDERING GUIDE  
Max Gain  
Linearity  
T.C. (ppm Temperature  
of F.S./؇C) Range  
Error Max Package  
@ +25؇C  
Model1  
Option2  
AD566AJD 10  
AD566AKD  
AD566ASD 10  
0°C to +70°C  
1/2 LSB  
1/4 LSB  
1/2 LSB  
1/4 LSB  
Ceramic (D-24)  
Ceramic (D-24)  
Ceramic (D-24)  
Ceramic (D-24)  
3
0°C to +70°C  
–55°C to +125°C  
–55°C to +125°C  
AD566ATD  
3
NOTES  
1For details on grade and package offerings screened in accordance with MIL-  
STD-883, refer to the Analog Devices Military Products Databook or current/  
883B data sheet.  
2D = Ceramic DIP.  
–6–  
REV. D