AD565A–SPECIFICATIONS (TA = +25؇C, VCC = +15 V, VEE = +15 V, unless otherwise noted.)
AD565AJ
Typ
AD565AK
Typ
Model
Min
Max
Min
Max
Units
DATA INPUTS1 (Pins 13 to 24)
TTL or 5 Volt CMOS
Input Voltage
Bit ON Logic “1”
+2.0
+5.5
+0.8
+2.0
+5.5
+0.8
V
V
Bit OFF Logic “0”
Logic Current (Each Bit)
Bit ON Logic “1”
+120
+35
+300
+100
+120
+35
+300
+100
µA
µA
Bit OFF Logic “0”
RESOLUTION
12
12
Bits
OUTPUT
Current
Unipolar (All Bits On)
Bipolar (All Bits On or Off)
Resistance (Exclusive of Span Resistors)
Offset
–1.6
؎0.8
6
–2.0
1.0
8
–2.4
؎1.2
10
–1.6
؎0.8
6
–2.0
1.0
8
–2.4
؎1.2
10
mA
mA
kΩ
Unipolar
0.01
0.05
25
0.05
0.15
0.01
0.05
25
0.05
0.1
% of F.S. Range
% of F.S. Range
pF
Bipolar (Figure 3, R2 = 50 Ω Fixed)
Capacitance
Compliance Voltage
TMIN to TMAX
–1.5
+10
–1.5
+10
V
ACCURACY (Error Relative to
Full Scale) +25°C
1/4
؎1/2
1/8
؎1/4
LSB
(0.006)
1/2
(0.012)
؎3/4
(0.003)
1/4
(0.006)
؎1/2
% of F.S. Range
LSB
T
MIN to TMAX
(0.012)
(0.018)
(0.006)
(0.012)
% of F.S. Range
DIFFERENTIAL NONLINEARITY
+25°C
1/2
؎3/4
1/4
؎1/2
LSB
TMIN to TMAX
MONOTONICITY GUARANTEED
MONOTONICITY GUARANTEED
TEMPERATURE COEFFICIENTS
With Internal Reference
Unipolar Zero
1
2
10
50
1
2
10
20
ppm/°C
ppm/°C
ppm/°C
ppm/°C
Bipolar Zero
5
5
Gain (Full Scale)
Differential Nonlinearity
15
2
10
2
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON
250
400
250
400
ns
FULL-SCALE TRANSITION
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
15
30
30
50
15
30
30
50
ns
ns
TEMPERATURE RANGE
Operating
Storage
0
–65
+70
+150
0
–65
+70
+150
°C
°C
POWER REQUIREMENTS
VCC, +11.4 to +16.5 V de
VEE, –11.4 to –16.5 V dc
3
5
3
5
mA
mA
–12
–18
–12
–18
POWER SUPPLY GAIN SENSITIVITY2
VCC = +11.4 to +16.5 V dc
3
15
10
25
3
15
10
25
ppm of F.S./%
ppm of F.S./%
VEE = –11.4 to –16.5 V dc
PROGRAMMABLE OUTPUT RANGES
(See Figures 2, 3, 4)
0 to +5
0 to +5
V
V
V
V
V
–2.5 to +2.5
0 to +10
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
–5 to +5
–10 to +10
EXTERNAL ADJUSTMENTS
Gain Error with Fixed 50 Ω
Resistor for R2 (Figure 2)
0.1
؎0.25
؎0.15
0.1
؎0.25
% of F.S. Range
Bipolar Zero Error with Fixed
50 Ω Resistor for R1 (Figure 3)
Gain Adjustment Range (Figure 2)
Bipolar Zero Adjustment Range
0.05
0.05
0.1
% of F.S. Range
% of F.S. Range
% of F.S. Range
0.25
0.15
0.25
0.15
REFERENCE INPUT
Input Impedance
15
20
25
15
20
25
kΩ
REFERENCE OUTPUT
Voltage
9.90
1.5
10.00
2.5
10.10
345
9.90
1.5
10.00
2.5
10.10
345
V
Current (Available for External Loads)3
mA
POWER DISSIPATION
225
225
mW
NOTES
1The digital inputs are guaranteed but not tested over the operating temperature range.
2The power supply gain sensitivity is tested in reference to a VCC, VEE of 15 V dc.
3For operation at elevated temperatures the reference cannot supply current for external loads. It, therefore, should be buffered if additional loads are to be supplied.
Specifications subject to change without notice.
–2–
REV. D
ADI [ ADI ]
