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AD538AD 参数 Datasheet PDF下载

AD538AD图片预览
型号: AD538AD
PDF下载: 下载PDF文件 查看货源
内容描述: 实时模拟计算单元ACU [Real-Time Analog Computational Unit ACU]
分类和应用: 模拟计算功能信号电路
文件页数/大小: 11 页 / 170 K
品牌: AD [ ANALOG DEVICES ]
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AD538
ANALOG COMPUTATION OF POWERS AND ROOTS
SQUARE ROOT OPERATION
It is often necessary to raise the quotient of two input signals to
a power or take a root. This could be squaring, cubing, square-
rooting or exponentiation to some noninteger power. Examples
include power series generation. With the AD538, only one or
two external resistors are required to set ANY desired power,
over the range of 0.2 to 5. Raising the basic quantity V
Z
/V
X
to a
power greater than one requires that the gain of the AD538’s log
ratio subtractor be increased, via an external resistor between
pins A and D. Similarly, a voltage divider that attenuates the log
ratio output between points B and C will program the power to
a value less than one.
R
A
B
V
Z
V
Y
3
2
V
Y
(
10
V
REF
V
Z m
)
V
REF
15
V
X
8
V
O
C
12
A
18
D
17
The explicit square root circuit of Figure 16 illustrates a precise
method for performing a real-time square root computation. For
added flexibility and accuracy, this circuit has a scale factor
adjustment.
The actual square rooting operation is performed in this circuit
by raising the quantity V
Z
/ V
X
to the one-half power via the
resistor divider network consisting of resistors R
B
and R
C
. For
maximum linearity, the two resistors should be 1% (or better)
ratio-matched metal film types.
One volt scaling is achieved by dividing-down the 2 V reference
and applying approximately 1 V to both the V
Y
and V
X
inputs.
In this circuit, the V
X
input is intentionally set low, to about
0.95 V, so that the V
Y
input can be adjusted high, permitting a
±
5% scale factor trim. Using this trim scheme, the output volt-
age will be within
±
3 mV
±
0.2% of the ideal value over a 10 V
to 1 mV input range (80 dB). For a decreased input dynamic
range of 10 mV to 10 V (60 dB) the error is even less; here the
output will be within
±
2 mV
±
0.2% of the ideal value. The
bandwidth of the AD538 square root circuit is approximately
280 kHz with a 1 V p-p sine wave with a +2 V dc offset.
This basic circuit may also be used to compute the cube, fourth
or fifth roots of an input waveform. All that is required for a
given root is that the correct ratio of resistors, R
C
and R
B
, be
selected such that their sum is between 150
and 200
Ω.
The optional absolute value circuit shown preceding the AD538
allows the use of bipolar input voltages. Only one op amp is
required for the absolute value function because the I
Z
input of
the AD538 functions as a summing junction. If it is necessary to
preserve the sign of the input voltage, the polarity of the op amp
output may be sensed and used after the computation to switch
the sign bit of a D.V.M. chip.
V
OUT
= 1V
V
IN
1V
POWERS
m
2
3
4
5
R
A
196
97.6
64.9
48.7
R
A
= 196
M –1
R
B
= R
C
200
R
B
B
V
Z
V
Y
3
2
10
V
Z m
)
V
Y
(
V
REF
V
REF
15
V
X
8
V
O
C
12
R
C
ROOTS
m
1/2
1/3
1/4
1/5
R
B
100
100
150
162
R
C
100
49.9
49.9
40.2
R
B
= 1 –1
R
C
M
Figure 15. Basic Configurations and Transfer Functions
for the AD538
OPTIONAL
ABSOLUTE VALUE SECTION
5k
10k
20k
IN4148
+V
S
IN4148
I
Z
V
Z
B
1
18
A
25k
2
LOG
RATIO
R
B
*
100
17
D
7
V
IN
20k
2
3
20k
1
8
6
V
OS
+10V
+2V
+2V
3
16
I
X
4
15
V
X
SIGNAL
GND
PWR
GND
100
5
100
25k
14
AD OP-07
4 OR AD611
(V
OS
TAP
–V
S
TO –V
S
)
+15V
6
INTERNAL
VOLTAGE
REFERENCE
OUTPUT
25k
AD538
13
–15V
7
V
OUT
V
O
8
12
C
I
Y
D1
V
Y
IN4148
11
ANTILOG
LOG
10
I
9
1k
100
SCALE FACTOR
TRIM
1k
25k
*
RATIO MATCH 1% METAL FILM
RESISTORS FOR BEST ACCURACY
R
C
*
100
Figure 16. Square Root Circuit
REV. C
–9–