欢迎访问ic37.com |
会员登录 免费注册
发布采购

AD538ADZ 参数 Datasheet PDF下载

AD538ADZ图片预览
型号: AD538ADZ
PDF下载: 下载PDF文件 查看货源
内容描述: 实时模拟计算单元(ACU ) [Real-Time Analog Computational Unit (ACU)]
分类和应用:
文件页数/大小: 17 页 / 511 K
品牌: ADI [ ADI ]
 浏览型号AD538ADZ的Datasheet PDF文件第7页浏览型号AD538ADZ的Datasheet PDF文件第8页浏览型号AD538ADZ的Datasheet PDF文件第9页浏览型号AD538ADZ的Datasheet PDF文件第10页浏览型号AD538ADZ的Datasheet PDF文件第12页浏览型号AD538ADZ的Datasheet PDF文件第13页浏览型号AD538ADZ的Datasheet PDF文件第14页浏览型号AD538ADZ的Datasheet PDF文件第15页  
AD538  
FUNCTIONAL DESCRIPTION  
STABILITY PRECAUTIONS  
As shown in Figure 1 and Figure 11, the VZ and VX inputs  
connect directly to the input log ratio amplifiers of the AD538.  
This subsection provides an output voltage proportional to the  
natural log of input voltage, VZ, minus the natural log of input  
voltage, VX. The output of the log ratio subsection at B can be  
expressed by the transfer function  
At higher frequencies, the multistaged signal path of the AD538  
can result in large phase shifts (as illustrated in Figure 11). If a  
condition of high incremental gain exists along that path (for  
example, VO = VY × VZ/VX = 10 V × 10 mV/10 mV = 10 V so  
that ΔVO/ΔVX = 1000), then small amounts of capacitive feedback  
from VO to the current inputs IZ or IX can result in instability.  
Appropriate care should be exercised in board layout to prevent  
capacitive feedback mechanisms under these conditions.  
Ln Z – Ln X  
VZ  
VX  
kT  
q
VB =  
ln  
I
X
Ln X  
M(Ln Z – Ln X)  
M(Ln Z – Ln X) +Ln Y  
LOG  
e
where:  
V
X
k is 1.3806 × 10−23 J/K.  
q is 1.60219 × 10−19 C.  
T is in Kelvins.  
ANTILOG  
0.2≤M≤5  
BUFFER  
Σ
Σ
e
+
+
+
M
The log ratio configuration may be used alone, if correctly  
temperature compensated and scaled to the desired output  
level (see the Applications Information section).  
V
V
Z
X
I
I
Z
Z
Y
V
= V  
Y
O
LOG  
LOG  
e
e
Ln Z  
Ln Y  
V
V
Y
Figure 11. Model Circuit  
Under normal operation, the log-ratio output will be directly  
connected to a second functional block at Input C, the antilog  
subsection. This section performs the antilog according to the  
transfer function:  
USING THE VOLTAGE REFERENCES  
A stable band gap voltage reference for scaling is included in the  
AD538. It is laser-trimmed to provide a selectable voltage output of  
+10 V buffered (Pin 4), +2 V unbuffered (Pin 5) or any voltages  
between +2 V and +10.2 V buffered as shown in Figure 12. The  
output impedance at Pin 5 is approximately 5 kΩ. Note that any  
loading of this pin produces an error in the +10 V reference  
voltage. External loads on the +2 V output should be greater  
than 500 kΩ to maintain errors less than 1%.  
q
kT  
V =V e V  
C
O
Y
As with the log-ratio circuit included in the AD538, the user  
may use the antilog subsection by itself. When both subsections  
are combined, the output at B is tied to C, the transfer function  
of the AD538 computational unit is:  
I
V
V
kT   
q
kT  
1
2
3
4
5
6
18  
17  
16  
15  
14  
13  
12  
11  
A
D
Z
Z
Z
X
ln  
Q
  
e
;VB =VC  
LOG  
RATIO  
25kΩ  
VO = VY  
V
+2V TO +10.2V  
BUFFERED  
which reduces to:  
B
I
X
VZ  
VX  
REF OUT  
V
X
VO = VY  
25kΩ  
100Ω  
100Ω  
+2V  
SIGNAL  
GND  
50kΩ  
Finally, by increasing the gain, or attenuating the output of the  
log ratio subsection via resistor programming, it is possible to  
raise the quantity VZ/VX to the mth power. Without external  
programming, m is unity. Thus, the overall AD538 transfer  
function equals:  
INTERNAL  
VOLTAGE  
REFERENCE  
11.5kΩ  
PWR  
GND  
+V  
S
AD538  
–V  
S
7
8
9
C
OUTPUT  
25kΩ  
V
O
I
Y
ANTILOG  
m  
VZ  
VX  
10  
V
Y
I
LOG  
VO = VY  
25kΩ  
Figure 12. +2 V to +10.2 V Adjustable Reference  
where 0.2 < m < 5.  
In situations not requiring both reference levels, the +2 V output  
can be converted to a buffered output by tying Pin 4 and Pin 5  
together. If both references are required simultaneously, the  
+10 V output should be used directly and the +2 V output  
should be externally buffered.  
When the AD538 is used as an analog divider, the VY input can  
be used to multiply the ratio VZ/VX by a convenient scale factor.  
The actual multiplication by the VY input signal is accomplished  
by adding the log of the VY input signal to the signal at C, which  
is already in the log domain.  
Rev. E | Page 10 of 16