AD5382
Table 16. Control Register Contents
MSB
LSB
CR13
CR12
CR11
CR10
CR9
CR8
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0
Control Register Write/Read
REG1 = REG0 = 0, A4–A0 = 01100, R/ status determines if
CR8: Thermal Monitor Function. This function is used to
monitor the AD5382’s internal die temperature when enabled.
The thermal monitor powers down the output amplifiers when
the temperature exceeds 130°C. This function can be used to
protect the device in cases where power dissipation may be
exceeded if a number of output channels are simultaneously
short-circuited. A soft power-up will re-enable the output
amplifiers if the die temperature has dropped below 130°C.
W
the operation is a write (R/ = 0) or a read (R/ = 1). DB13 to
W
W
DB0 contains the control register data.
Control Register Contents
CR13: Power-Down Status. This bit is used to configure the
output amplifier state in power down.
CR13 = 1. Amplifier output is high impedance (default on
power-up).
CR8 = 1: Thermal Monitor Enabled.
CR8 = 0: Thermal Monitor Disabled (default on power- up).
CR7 and CR6: Don’t Care.
CR13 = 0. Amplifier output is 100 kΩ to ground.
CR12: REF Select. This bit selects the operating internal
reference for the AD5382. CR12 is programmed as follows:
CR5 to CR2: Toggle Function Enable. This function allows the
user to toggle the output between two codes loaded to the A and
B register for each DAC. Control register bits CR5 to CR2 are
used to enable individual groups of eight channels for opera-
tion in toggle mode. A Logic 1 written to any bit enables a group
CR12 = 1: Internal reference is 2.5 V (AD5382-5 default), the
recommended operating reference for AD5382-5.
CR12 = 0: Internal reference is 1.25 V (AD5382-3 default),
the recommended operating reference for AD5382-3.
of channels; a Logic 0 disables a group.
is used to toggle
LDAC
between the two registers. Table 17 shows the decoding for
toggle mode operation. For example, CR5 controls group 3,
which contains channels 24 to 31, CR5 = 1 enables these
channels .
CR11: Current Boost Control. This bit is used to boost the
current in the output amplifier, thereby altering its slew rate.
This bit is configured as follows:
CR11 = 1: Boost Mode On. This maximizes the bias current
in the output amplifier, optimizing its slew rate but increasing
the power dissipation.
CR1 and CR0: Don’t Care.
Table 17.
CR Bit
Group
Channels
24–31
16–23
8–15
CR11 = 0: Boost Mode Off (default on power-up). This
reduces the bias current in the output amplifier and reduces
the overall power consumption.
CR5
CR4
CR3
CR2
3
2
1
0
CR10: Internal/External Reference. This bit determines if the
DAC uses its internal reference or an externally applied
reference.
0–7
Channel Monitor Function
REG1 = REG0 = 0, A4–A0 = 01010
CR10 = 1: Internal Reference Enabled. The reference output
depends on data loaded to CR12.
DB13–DB8 = Contain data to address the monitored channel.
CR10 = 0: External Reference Selected (default on power up).
A channel monitor function is provided on the AD5382. This
feature, which consists of a multiplexer addressed via the
interface, allows any channel output or the signals connected to
the MON_IN inputs to be routed to the MON_OUT pin for
monitoring using an external ADC. The channel monitor
function must be enabled in the control register before any
channels are routed to MON_OUT. On the AD5382, DB13 to
DB8 contain the channel address for the monitored channel.
Selecting channel address 63 three-states MON_OUT.
CR9: Channel Monitor Enable (see Channel Monitor Function)
CR9 = 1: Monitor Enabled. This enables the channel monitor
function. After a write to the monitor channel in the SFR
register, the selected channel output is routed to the
MON_OUT pin.
CR9 = 0: Monitor Disabled (default on power-up). When the
monitor is disabled, MON_OUT is three-stated.
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