Application Note
AN-1109
SOURCES OF RADIATED EMISSIONS
There are two potential sources of emissions in PCBs: edge
emissions and input-to-output dipole emissions.
INPUT-TO-OUTPUT DIPOLE EMISSIONS
The primary mechanism for radiation is an input-to-output
dipole generated by driving a current source across a gap
between ground planes. Isolators, by their very nature, drive
current across gaps in ground planes. The inability of high
frequency image charges associated with the transmitted cur-
rent to return across the boundary causes differential signals
across the gap driving the dipole. In some cases, this may be a
large dipole, as shown in Figure 4. A similar mechanism causes
high frequency signal lines to radiate when crossing splits in the
ground and power planes. This type of radiation is predomi-
nantly perpendicular to the ground planes.
EDGE EMISSIONS
Edge emissions occur when unintended currents meet the edges
of ground and power planes. These unintended currents can
originate from
•
Ground and power noise, generated by inadequate bypass
of high power current sinks.
•
Cylindrically radiated magnetic fields coming from
inductive via penetrations radiated out between board
layers eventually meeting the board edge.
•
Stripline image charge currents spreading from high
frequency signal lines routed too close to the edge of
the board.
Edge emissions are generated where differential noise from
many sources meet the edge of the board and leak out of a
plane-to-plane space, acting as a wave guide (see Figure 2).
GROUND
POWER
Figure 2. Edge Radiation from an Edge Matched Ground Power Pair
GROUND
POWER
Figure 4. Dipole Radiation Between Input and Output
h
The ADuM140x devices serve as a good example of the issues
involved in generating and mitigating emissions.
20h
SIGNAL
Figure 3. Edge Radiation from an Edge Mismatched Power Ground Pair
When operating under a full 5 V VDD supply voltage, the peak
currents of the transmitter pulses is about 70 mA, and these
pulses are 1 ns wide with fast edge rates.
At the edge boundary, there are two limiting conditions: the
edges of the ground and power planes are aligned as in Figure 2
or one edge is pulled back by some amount as shown in Figure 3.
In the first case, with aligned edges, there is some reflection
back into the PCB and some transmission of the fields out of
the PCB. In the second case, the edges of the board make a
structure similar to the edge of a patch antenna. When the
edges mismatch by 20h where h is the plane-to-plane pacing,
the fields efficiently couple out of the PCB, resulting in high
emissions (see “Minimizing EMI Caused by Radially Propagating
Waves Inside High Speed Digital Logic PCBs” in the References
section). These two limiting cases are important considerations
as described in the edge treatment of the PCB in the Edge
Guarding section.
Bypass capacitors are intended to provide this high frequency
current locally. The capacitor must provide large charge reserves.
At the same time, the capacitor should have a very low series
resistance at high frequencies in the 100 MHz to 1 GHz range.
Even with multiple low ESR capacitors near the pins, induc-
tively limited bypassing generates voltage transients, and the
noise may be injected onto the ground and power planes. The
self-resonant frequency of capacitors should be considered.
Having multiple capacitors of various sizes, 100 nF, 10 nF, and
1 nF, may help reduce this effect.
Figure 5 shows emissions data collected in an anechoic chamber
taken with a 4-channel ADuM1402 with 5 V supplies, running
at 1 Mbps signal frequency and using a standard 4-layer PCB,
but without an input-to-output ground plane stitching
capacitance.
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