AN-1109
Application Note
TABLE OF CONTENTS
Introduction ...................................................................................... 1
3.3 V Operation.............................................................................9
Recommended Design Practices.............................................. 10
Meeting Isolation Standards ..................................................... 10
Example Board............................................................................ 10
Gap Board Layout Results......................................................... 12
Conclusions..................................................................................... 14
Appendix A—PCB Examples........................................................ 15
Low Noise PCB Example........................................................... 15
Gap PCB Example...................................................................... 17
References........................................................................................ 19
EMI Mitigation Overview ............................................................... 1
Revision History ............................................................................... 2
Sources of Radiated Emissions ....................................................... 3
Edge Emissions ............................................................................. 3
Input-to-Output Dipole Emissions............................................ 3
Sources of Conducted Noise ........................................................... 5
EMI Mitigation Techniques ............................................................ 6
Input-to-Output Stitching........................................................... 6
Edge Guarding .............................................................................. 8
Interplane Capacitance ................................................................ 8
REVISION HISTORY
4/11—Revision 0: Initial Version
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