ACT8935
Rev 4, 17-Sep-13
Table 5:
Control Pins
PIN NAME
IF PWRSTAT[ ] = 0
IF PWRSTAT[ ] = 1
PBIN
REG1, REG2, REG3, REG5
REG1, REG2, REG3, REG5
REG1, REG2, REG5
REG1, REG2, REG5
EXTON
PWRHLD
PWREN
REG1, REG2, REG5
REG3, REG4, REG6, REG7
Manual Reset Function
Control Signals
The second major function of the PBIN input is to
provide a manual-reset input for the processor. To
manually-reset the processor, drive PBIN directly to
VSYS through a low impedance (less than 2.5kꢀ).
When this occurs, nRSTO immediately asserts low,
then remains asserted low until the PBIN input is
de-asserted and the reset time-out period expires.
Enable Inputs
The ACT8935 features a variety of control inputs,
which are used to enable and disable outputs
depending upon the desired mode of operation.
PWREN, PWRHLD, and EXTON are logic inputs,
while PBIN is a unique, multi-function input. Refer
to Table 5 for a description of which channels are
controlled by each input.
nPBSTAT Output
nPBSTAT is an open-drain output that reflects the
state of the PBIN input; nPBSTAT is asserted low
whenever PBIN is asserted, and is high-Z
otherwise. This output is typically used as an
interrupt signal to the processor, to initiate a
software-programmable routine such as operating
mode selection or to open a menu. Connect
nPBSTAT to an appropriate supply voltage
(typically OUT2) through a 10kꢀ or greater resistor.
PBIN Multi-Function Input
ACT8935 features the PBIN multi-function pin,
which combines system enable/disable control with
a hardware reset function. Select either of the two
pin functions by asserting this pin, either through a
direct connection to VSYS, or through a 50kꢀ
resistor to VSYS, as shown in Figure 2.
Figure 2:
nRSTO Output
PBIN Input
nRSTO is an open-drain output which asserts low
upon startup or when manual reset is asserted via
the PBIN input. When asserted on startup, nRSTO
remains low until reset time-out period expires after
OUT2 reaches its power-OK threshold. When
asserted due to manual-reset, nRSTO immediately
asserts low, then remains asserted low until the
PBIN input is de-asserted and the reset time-out
period expires.
Connect a 10kꢀ or greater pull-up resistor from
nRSTO to an appropriate voltage supply (typically
OUT2) .
Enable / Wake-Up
nIRQ Output
The most common application for PBIN is to drive it
to VSYS through a 50kꢀ resistor. In this case, PBIN
initiates system enable, if the system is disabled, or
is used to initiate a wake up routine from SLEEP
mode.
nIRQ is an open-drain output that asserts low any
time an interrupt is generated. Connect a 10kꢀ or
greater pull-up resistor from nIRQ to an appropriate
voltage supply. nIRQ is typically used to drive the
interrupt input of the system processor.
In order to initiate a wake up routine or any other
function that is initiated through push-button
assertion, the processor should monitor the
ACT8935's nPBSTAT output. See the nPBSTAT
Output section for more information.
Many of the ACT8935's functios support interrupt-
generation as a result of various conditions. These
are typically masked by default, but may be
unmasked via the I2C interface. For more
information about the available fault conditions,
Innovative PowerTM
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