ACT8933
Rev 3, 15-Nov-12
Table 4:
ACT8933 and CoreLogic LUCY Signal Interface
ACT8933
PWREN
SCL
DIRECTION
CoreLogic LUCY
PWR_EN
I2C0_SCL
I2C0_SDA
VSELꢀ
SDA
VSEL
nRSTO
nIRQ
EX_nRESET
PMIC_INTꢁ
nPBSTAT ꢂ
nLBO
nPBSTAT
nLBO
PWRHLD
PWRHLD GPIOꢃ
1: Optional connection for DVS control.
2, ꢂ: Typical connections shown, actual connections may vary.
ꢃ: Optional connection for power hold control.
Table 5:
Control Pins
PIN NAME
nPBIN
OUTPUT
REG1, REG2, REG5
REG1, REG2, REG5
REG3, REG4
PWRHLD
PWREN
Figure 2:
Control Signals
nPBIN Input
Enable Inputs
The ACT8933 features a variety of control inputs,
which are used to enable and disable outputs
depending upon the desired mode of operation.
PWREN, PWRHLD are logic inputs, while nPBIN is
a unique, multi-function input. Refer to Table 5 for a
description of which channels are controlled by
each input.
nPBIN Multi-Function Input
ACT8933 features the nPBIN multi-function pin,
which combines system enable/disable control with
a hardware reset function. Select either of the two
pin functions by asserting this pin, either through a
direct connection to GA, or through a 50kꢀ resistor
to GA, as shown in Figure 2.
nPBSTAT Output
nPBSTAT is an open-drain output that reflects the
state of the nPBIN input; nPBSTAT is asserted low
whenever nPBIN is asserted, and is high-Z
otherwise. This output is typically used as an
interrupt signal to the processor, to initiate a
software-programmable routine such as operating
mode selection or to open a menu. Connect
nPBSTAT to an appropriate supply voltage
(typically OUT5) through a 10kꢀ or greater resistor.
Manual Reset Function
The second major function of the nPBIN input is to
provide a manual-reset input for the processor. To
manually-reset the processor, drive nPBIN directly
to GA through a low impedance (less than 2.5kꢀ).
When this occurs, nRSTO immediately asserts low,
then remains asserted low until the nPBIN input is
de-asserted and the reset time-out period expires.
nRSTO Output
nRSTO is an open-drain output which asserts low
Innovative PowerTM
www.active-semi.com
- 28 -
Active-Semi Proprietary―For Authorized Recipients and Customers
ActivePMUTM and ActivePathTM are trademarks of Active-Semi.
I2CTM is a trademark of NXP.
Copyright © 2012 Active-Semi, Inc.
ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
