ACT8933
Rev 3, 15-Nov-12
SYSTEM CONTROL INFORMATION
Interfacing with the CoreLogic LUCY
The ACT8933 is optimized for use in applications
using the CoreLogic LUCY processor, supporting
both the power domains as well as the signal
interface for these processors.
the ACT8933 pin names and the CoreLogic LUCY
processor pin names are provided. When this is
done, the CoreLogic LUCY pin names are located
after the ACT8933 pin names, and are italicized
and located inside parentheses. For example,
PWREN (PWR_EN) refers to the logic signal
applied to the ACT8933's PWREN input, identifying
that it is driven from the CoreLogic LUCY's
PWR_EN output. Likewise, OUT5 (VDD_IO) refers
to ACT8933's OUT5 pin, identifying that it is
connected to the CoreLogic LUCY's VDD_IO power
domain.
While the ACT8933 supports many possible
configurations for powering these processors, one
of the most common configurations is detailed in
this datasheet. In general, this document refers to
the ACT8933 pin names and functions. However, in
cases where the description of interconnections
between these devices benefits by doing so, both
Table 2:
ACT8933 and CoreLogic LUCY Power Domains
POWER DOMAIN
ACT8933 CHANNEL
TYPE
DC/DC
DC/DC
DEFAULT VOLTAGE
1.2V/1.2V
CURRENT CAPABILITY
900mA
VDDINTER
VDDALIVE
VDDPLL
REG1
VDDDDR
REG2
1.8V/1.8V
700mA
VDDIO
VDDCAM
VDDOSCHDMI
VDDUARTx
AVDDU30x
etc.
REG3
DC/DC
3.1V/3.1V
900mA
VDDPLLxHDMI
VDDUSB
etc.
REG4
REG5
LDO
LDO
1.2V
3.1V
250mA
250mA
VDDIO
VDDOSC
VDDGPIO
MSVDD18
MIPI_PLL_VDD18
VDDSEN18
REG6
REG7
LDO
LDO
1.8V
3.1V
250mA
250mA
VDDGPS etc.
Table 3:
ACT8933 and CoreLogic LUCY Power Modes
POWER
QUIESCENT
CURRENT
CONTROL STATE
MODE
POWER DOMAIN STATE
PWRHLD is asserted, PWREN is asserted,
REG6, REG7 are enabled by I2C
REG1, REG2, REG3, REG4, REG5,
REG6 and REG7 are all on
ALL ON
420µA
PWRHLD is asserted, PWREN is asserted,
REG6 and REG7 are disabled as default
REG1, REG2, REG3, REG4 and REG5
are on. REG6 and REG7 are off
NORMAL
350µA
250µA
<18µA
PWRHLD is asserted, PWREN is de-asserted, REG1, REG2 and REG5 are on. REG3,
SLEEP
REG6 and REG7 are disabled by I2C
REG4, REG6 and REG7 are off
PWRHLD is de-asserted, PWREN is de-
REG1, REG2, REG3, REG4, REG5,
REG6 and REG7 are all off
ALL OFF
asserted, REG6 and REG7 are disabled by I2C
Innovative PowerTM
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