ACT8840
Rev 2, 29-Jan-15
Figure 2:
Control Signals
nPBIN Input
Enable Inputs
The ACT8840 features a variety of control inputs,
which are used to enable and disable outputs
depending upon the desired mode of operation.
PWREN, PWRHLD are logic inputs, while nPBIN is
a unique, multi-function input.
nPBIN Multi-Function Input
The ACT8840 features the nPBIN multi-function
pin, which combines system enable/disable control
with a hardware reset function. Select either of the
two pin functions by asserting this pin, either
through a direct connection to GA, or through a
50kꢀ resistor to GA, as shown in Figure 2.
nRSTO Output
Manual Reset Function
nRSTO is an open-drain output which asserts low
upon startup or when manual reset is asserted via
the nPBIN input. When asserted on startup, nRSTO
remains low until reset time-out period expires.
When asserted due to manual-reset, nRSTO
immediately asserts low, then remains asserted low
until the nPBIN input is de-asserted and the reset
time-out period expires.
The second major function of the nPBIN input is to
provide a manual-reset input for the processor. To
manually-reset the processor, drive nPBIN directly
to GA through a low impedance (less than 2.5kꢀ).
An internal timer detects the duration of the MR
event:
Short Press / Soft-Reset:
Connect a 10kꢀ or greater pull-up resistor from
nRSTO to an appropriate voltage supply.
If the MR is asserted for less than 4s, ACT8840
commences a soft-reset operation where nRSTO
immediately asserts low, then remains asserted low
until the nPBIN input is de-asserted and the reset
time-out period expires. A status bit, SRSTAT[ ] , is
set after a soft-reset event. The SRSTAT[ ] bit is
automatically cleared to 0 after read. After Short
Press, set WDSREN[ ] to 1 about 1s after nRSTO
de-assert then clear WDSREN[ ] for properly
shutdown sequence.
nIRQ Output
nIRQ is an open-drain output that asserts low any
time an interrupt is generated. Connect a 10kꢀ or
greater pull-up resistor from nIRQ to an appropriate
voltage supply. nIRQ is typically used to drive the
interrupt input of the system processor.
Many of the ACT8840's functions support interrupt-
generation as a result of various conditions. These
are typically masked by default, but may be
unmasked via the I2C interface. For more
information about the available fault conditions,
refer to the appropriate sections of this datasheet.
Long Press / Power-cycle:
If the MR is asserted for more than 4s, ACT8840
commences a power cycle routine in which case all
regulators are turned off and then turned back on. A
status bit, PCSTAT[ ], is set after the power cycle.
The PCSTAT[ ] bit is automatically cleared to 0 after
read.
nPBSTAT Output
nPBSTAT is an open-drain output that reflects the
state of the nPBIN input; nPBSTAT is asserted low
whenever nPBIN is asserted, and is high-Z
otherwise. This output is typically used as an
interrupt signal to the processor, to initiate a
software-programmable routine such as operating
mode selection or to open a menu. Connect
nPBSTAT to an appropriate supply voltage through
a 10kꢀ or greater resistor.
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