ACT8840
Rev 2, 29-Jan-15
SYSTEM CONTROL INFORMATION
Interfacing with the Telechips TCC88xx Processors
The ACT8840 is optimized for the general Single-
core processors, supporting both the power
domains as well as the signal interface. The
following paragraphs describe how to design
ACT8840 with the general Single-core processors.
configurations for powering these processors, one
of the most common configurations is detailed in
this datasheet.
While the ACT8840 supports many possible
Table 1:
ACT8840 Power Domains
ACT8840
REGULATOR
DEFAULT
VOLTAGE CURRENT ORDER
MAX
POWER UP
POWER OFF
ORDER
POWER DOMAIN
ON/OFF @ SLEEP
TYPE
VDD_M0
PVDD_MEM
VDD_EXT0~2
VDD_LCD
VDD_AUD
REG1
3.3V
1.3A
3
ON
1
DC/DC Step Down
VDD_SYS0~1
VDD_CKO
VDD_KEY
VDD_MODEM
VDD_IO
REG2
REG3
REG4
VDD_ARM
1.25V
1.8V
1.1V
1.8A
1.8A
1.3A
2
3
2
OFF
ON
2
1
2
DC/DC Step Down
DC/DC Step Down
DC/DC Step Down
VDD_M1~2
VDD_MEM1~2
VDD_INT
OFF
VDD_UOTG_D
VDD_UHOST_D
REG5
REG6
REG7
1.1V
1.1V
3.3V
150mA
150mA
350mA
3
1
3
OFF
ON
1
3
1
Low-Noise LDO
Low-Noise LDO
Low-Noise LDO
VDD_ALIVE
VDD_UOTG_A
VDD_UHOST_A
OFF
VDD_APLL
VDD_MPLL
VDD_VPLL
VDD_EPLL
VDD_HDMI
REG8
1.1V
350mA
2
OFF
2
Low-Noise LDO
VDD_HDMI_PLL
VDD_MIPI_D
VDD_MIPI_PLL
REG9
REG10
REG11
VDD_CAM
VDD_ADC
2.8V
3.3V
1.8V
350mA
150mA
350mA
3
3
3
ON
OFF
OFF
1
1
1
Low-Noise LDO
Low Input-Voltage LDO
Low Input-Voltage LDO
VDD_MIPI_A
VDD_DAC
VDD_DAC_A
VDD_HDMI_OSC
REG12
REG13
3.3V
3.0V
350mA
50mA
3
0
OFF
ON
1
0
Low Input-Voltage LDO
Always-ON LDO
VDD_RTC
Innovative PowerTM
- 28 -
www.active-semi.com
Active-Semi Proprietary―For Authorized Recipients and Customers
ActivePMUTM is a trademark of Active-Semi.
I2CTM is a trademark of NXP.
Copyright © 2015 Active-Semi, Inc.
ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
