Actel Fusion Mixed-Signal FPGAs
Table 2-36 • Analog Block Pin Description (continued)
Number
of Bits
Location of
Details
Signal Name
Direction
Function
DAVOUT0, DACOUT0, DATOUT0
to
30
Output
Digital outputs – 3 per quad
Analog Quad
DAVOUT9, DACOUT9, DATOUT9
DENAV0, DENAC0, DENAT0 to
DENAV9, DENAC9, DENAT9
30
Input
Digital input enables – 3 per quad
Analog Quad 0
Analog Quad
AV0
1
1
1
1
1
Input
Input
Analog Quad
Analog Quad
Analog Quad
Analog Quad
AC0
AG0
Output
Input
AT0
ATRETURN01
Input
Temperature monitor return shared Analog Quad
by Analog Quads 0 and 1
AV1
1
1
1
1
1
1
1
1
1
Input
Input
Analog Quad 1
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
AC1
AG1
Output
Input
AT1
AV2
Input
Input
Analog Quad 2
AC2
AG2
Output
Input
AT2
ATRETURN23
Input
Temperature monitor return shared Analog Quad
by Analog Quads 2 and 3
AV3
1
1
1
1
1
1
1
1
1
Input
Input
Analog Quad 3
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
AC3
AG3
Output
Input
AT3
AV4
Input
Input
Analog Quad 4
AC4
AG4
Output
Input
AT4
ATRETURN45
Input
Temperature monitor return shared Analog Quad
by Analog Quads 4 and 5
AV5
AC5
AG5
AT5
AV6
AC6
AG6
AT6
1
1
1
1
1
1
1
1
Input
Input
Analog Quad 5
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Output
Input
Input
Analog Quad 6
Input
Output
Input
Preliminary v1.7
2-83
ACTEL [ Actel Corporation ]
