Actel Fusion Mixed-Signal FPGAs
Flash Memory Block Addressing
Figure 2-33 shows a graphical representation of the flash memory block.
Spare Page
Page 31
.
ages
. . .
33 P
n
r
o
t
c
Se
Page 3
Page 2
Page 1
Page 0
1
0
r
r
o
t
t
c
c
Se
o
Se
1190
140
1
Block
0
2
3
4
5
6
7
Notes:
1 block = 128 bits
1 page = 8 blocks plus the AUX block
1 sector = 33 pages
Block Organization
1 Flash array = 64 sectors
Figure 2-33 • Flash Memory Block Organization
Each FB is partitioned into sectors, pages, blocks, and bytes. There are 64 sectors in an FB, and each
sector contains 32 pages and 1 spare page. Each page contains 8 data blocks and 1 auxiliary block.
Each data block contains 16 bytes of user data, and the auxiliary block contains 4 bytes of user
data.
Addressing for the FB is shown in Table 2-20.
Table 2-20 • FB Address Bit Allocation ADDR[17:0]
17 12 11
7
6
4
3
0
Sector
Page
Block
Byte
When the spare page of a sector is addressed (SPAREPAGE active), ADDR[11:7] are ignored.
When the Auxiliary block is addressed (AUXBLOCK active), ADDR[6:2] are ignored.
Note: The spare page of sector 0 is unavailable for any user data. Writes to this page will return an
error, and reads will return all zeroes.
Preliminary v1.7
2-45
ACTEL [ Actel Corporation ]
