Actel Fusion Mixed-Signal FPGAs
Temperature Monitor. There is one Temperature Monitor in each Quad. A simplified block diagram
is shown in Figure 2-77.
VDD33A
10 µA
ATx
100 µA
TMSTBx
+
–
to Analog MUX
(refer Table 2-36
for MUX Channel
Number)
+
VADC
∆V
–
12.5 X
ATRTNxy
Figure 2-77 • Block Diagram for Temperature Monitor Circuit
The Fusion approach to measuring temperature is forcing two different currents through the diode
with a ratio of 10:1. The switch that controls the different currents is controlled by the Temperature
Monitor Strobe signal, TMSTB. Setting TMSTB to '1' will initiate a Temperature reading. The TMSTB
should remain '1' until the ADC finishes sampling the voltage from the Temperature Monitor. The
minimum sample time for the Temperature Monitor cannot be less than the minimum strobe high
time minus the setup time. Figure 2-78 shows the timing diagram.
tTMSHI
TMSTBx
tTMSLO
tTMSSET
VADC
ADC should start
sampling at this point
ADCSTART
Figure 2-78 • Timing Diagram for the Temperature Monitor Strobe Signal
The diode’s voltage is measured at each current level and the temperature is calculated based on
EQ 2-7.
ITMSLO
kT
q
⎛
⎞
⎠
----- ---------------
TMSLO – VTMSHI = n ln
V
⎝
ITMSHI
EQ 2-7
Preliminary v1.7
2-97
ACTEL [ Actel Corporation ]
