ACT™ 2 Family FPGAs
Timing Derating Factor (Temperature and Voltage)
Industrial
Military
Min.
0.69
Max.
1.11
Min.
0.67
Max.
1.23
(Commercial Minimum/Maximum Specification) x
Timing Derating Factor for Designs at Typical Temperature (TJ = 25°C) and
Voltage (5.0 V)
(Commercial Maximum Specification) x
0.85
Temperature and Voltage Derating Factors
(normalized to Worst-Case Commercial, TJ = 4.75 V, 70°C)
–55
–40
0
25
70
85
125
4.50
4.75
5.00
5.25
5.50
0.75
0.71
0.69
0.68
0.67
0.79
0.75
0.72
0.69
0.69
0.86
0.82
0.80
0.77
0.76
0.92
0.87
0.85
0.82
0.81
1.06
1.00
0.97
0.95
0.93
1.11
1.05
1.02
0.98
0.97
1.23
1.16
1.13
1.09
1.08
Junction Temperature and Voltage Derating Curves
(normalized to Worst-Case Commercial, TJ = 4.75V, 70°C)
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
125˚C
85˚C
70˚C
25˚C
0˚C
–40˚C
–55˚C
4.50
4.75
5.00
5.25
5.50
Voltage (V)
Note: This derating factor applies to all routing and propagation delays.
v4.0
11