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5962-0151502QXC 参数 Datasheet PDF下载

5962-0151502QXC图片预览
型号: 5962-0151502QXC
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 72000 Gates, 139MHz, 6036-Cell, CMOS, CQFP256, CERAMIC, QFP-256]
分类和应用: 时钟可编程逻辑
文件页数/大小: 21 页 / 171 K
品牌: ACTEL [ Actel Corporation ]
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4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b. Constant acceleration method 2001 of MIL-STD-883 shall be performed to condition B for devices built with case outline
Y, and condition D for devices built with case outline X.
c.
d.
e.
f.
Binning program performed prior to burn-in.
Interim and final electrical test parameters shall be as specified in table IIA herein.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
Additional screening for devices 03, 04, 07, and 08 shall include:
(1)
(2)
(3)
(4)
100% Internal visual, TM 2010 condition A
100% PIND (PIND is included for all devices (01 through 08))
Serialization (Serialization is included for all devices (01 through 08))
Static Burn-in, delta, read and record, PDA (3% functional)
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). Qualification inspection for all devices (01 to 08) complies with class Q
level requirements only.
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device
class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for
device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4). Conformance inspection for device 03, 04, 07, and 08 comply with class Q level requirement only,
wafer lot specific group C inspection may be conducted under contract with acquiring activities.
4.4.1 Group A inspection.
a.
b.
c.
Tests shall be as specified in table IIA herein.
Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.
Subgroup 4 (CI/O measurements) shall be measured only for initial qualification and after any process or design
changes which may affect input or output capacitance. Capacitance shall be measured between the designated
terminal and GND at a frequency equal or less than 1 MHz. Sample size is on a minimum of three devices with no
failures on a minimum of five worst case pins from each device.
O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon
request. For device classes Q and V, the procedures and circuits shall be under the control of the device
manufacturer's technical review board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the
preparing activity or acquiring activity upon request. Testing shall be on all pins, on a minimum of three devices with
zero failures. Latch-up test shall be considered destructive. Information contained in JEDEC Standard EIA/JESD78
may be used for reference.
d.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-01515
SHEET
E
6